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Searched refs:ixGRA00 (Results 1 – 19 of 19) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/dce/
H A Ddce_6_0_d.h301 #define ixGRA00 0x0000 macro
H A Ddce_8_0_d.h5100 #define ixGRA00 0x0 macro
H A Ddce_10_0_d.h5983 #define ixGRA00 0x0 macro
H A Ddce_11_0_d.h6060 #define ixGRA00 0x0 macro
H A Ddce_11_2_d.h7734 #define ixGRA00 0x0 macro
H A Ddce_12_0_offset.h18173 #define ixGRA00 … macro
/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_0_3_offset.h7266 #define ixGRA00 … macro
H A Ddcn_3_0_1_offset.h12065 #define ixGRA00 … macro
H A Ddcn_1_0_offset.h12804 #define ixGRA00 … macro
H A Ddcn_2_1_0_offset.h12669 #define ixGRA00 … macro
H A Ddcn_3_2_0_offset.h13436 #define ixGRA00 … macro
H A Ddcn_3_1_5_offset.h13989 #define ixGRA00 … macro
H A Ddcn_3_1_4_offset.h115 #define ixGRA00 … macro
H A Ddcn_3_1_2_offset.h13883 #define ixGRA00 … macro
H A Ddcn_3_2_1_offset.h13390 #define ixGRA00 … macro
H A Ddcn_3_1_6_offset.h14480 #define ixGRA00 … macro
H A Ddcn_3_0_2_offset.h15068 #define ixGRA00 … macro
H A Ddcn_2_0_0_offset.h16333 #define ixGRA00 … macro
H A Ddcn_3_0_0_offset.h16818 #define ixGRA00 … macro