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Searched refs:ixDIDT_TCP_CTRL0 (Results 1 – 12 of 12) sorted by relevance

/linux/drivers/gpu/drm/amd/pm/powerplay/hwmgr/
H A Dsmu7_powertune.c228 …{ ixDIDT_TCP_CTRL0, DIDT_TCP_CTRL0__DIDT_CTRL_EN_MASK, DIDT_…
229 …{ ixDIDT_TCP_CTRL0, DIDT_TCP_CTRL0__USE_REF_CLOCK_MASK, DIDT_…
230 …{ ixDIDT_TCP_CTRL0, DIDT_TCP_CTRL0__PHASE_OFFSET_MASK, DIDT_…
231 …{ ixDIDT_TCP_CTRL0, DIDT_TCP_CTRL0__DIDT_CTRL_RST_MASK, DIDT_…
232 …{ ixDIDT_TCP_CTRL0, DIDT_TCP_CTRL0__DIDT_CLK_EN_OVERRIDE_MASK, DIDT_…
233 …{ ixDIDT_TCP_CTRL0, DIDT_TCP_CTRL0__DIDT_MAX_STALLS_ALLOWED_HI_MASK, DIDT_…
234 …{ ixDIDT_TCP_CTRL0, DIDT_TCP_CTRL0__DIDT_MAX_STALLS_ALLOWED_LO_MASK, DIDT_…
235 …{ ixDIDT_TCP_CTRL0, DIDT_TCP_CTRL0__UNUSED_0_MASK, DIDT_…
370 …{ ixDIDT_TCP_CTRL0, DIDT_TCP_CTRL0__DIDT_CTRL_EN_MASK, DIDT_…
371 …{ ixDIDT_TCP_CTRL0, DIDT_TCP_CTRL0__USE_REF_CLOCK_MASK, DIDT_…
[all …]
H A Dvega10_powertune.c229 …{ ixDIDT_TCP_CTRL0, DIDT_TCP_CTRL0__DIDT_CTRL_EN_MASK, DIDT_TCP_CTRL0__DIDT_CTR…
230 …{ ixDIDT_TCP_CTRL0, DIDT_TCP_CTRL0__PHASE_OFFSET_MASK, DIDT_TCP_CTRL0__PHASE_OF…
231 …{ ixDIDT_TCP_CTRL0, DIDT_TCP_CTRL0__DIDT_CTRL_RST_MASK, DIDT_TCP_CTRL0__DIDT_CT…
232 …{ ixDIDT_TCP_CTRL0, DIDT_TCP_CTRL0__DIDT_CLK_EN_OVERRIDE_MASK, DIDT_TCP_CTRL0__…
233 …{ ixDIDT_TCP_CTRL0, DIDT_TCP_CTRL0__DIDT_STALL_CTRL_EN_MASK, DIDT_TCP_CTRL0__DI…
234 …{ ixDIDT_TCP_CTRL0, DIDT_TCP_CTRL0__DIDT_TUNING_CTRL_EN_MASK, DIDT_TCP_CTRL0__D…
235 …{ ixDIDT_TCP_CTRL0, DIDT_TCP_CTRL0__DIDT_STALL_AUTO_RELEASE_EN_MASK, DIDT_TCP_C…
236 …{ ixDIDT_TCP_CTRL0, DIDT_TCP_CTRL0__DIDT_HI_POWER_THRESHOLD_MASK, DIDT_TCP_CTRL…
237 …{ ixDIDT_TCP_CTRL0, DIDT_TCP_CTRL0__DIDT_AUTO_MPD_EN_MASK, DIDT_TCP_CTRL0__DIDT…
238 …{ ixDIDT_TCP_CTRL0, DIDT_TCP_CTRL0__DIDT_STALL_EVENT_EN_MASK, DIDT_TCP_CTRL0__D…
[all …]
/linux/drivers/gpu/drm/amd/include/asic_reg/gca/
H A Dgfx_7_0_d.h2525 #define ixDIDT_TCP_CTRL0 0x60 macro
H A Dgfx_7_2_d.h2550 #define ixDIDT_TCP_CTRL0 0x60 macro
H A Dgfx_8_1_d.h2776 #define ixDIDT_TCP_CTRL0 0x60 macro
H A Dgfx_8_0_d.h2798 #define ixDIDT_TCP_CTRL0 0x60 macro
/linux/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_offset.h7220 #define ixDIDT_TCP_CTRL0 … macro
H A Dgc_9_1_offset.h7426 #define ixDIDT_TCP_CTRL0 … macro
H A Dgc_9_4_2_offset.h117 #define ixDIDT_TCP_CTRL0 … macro
H A Dgc_9_2_1_offset.h7463 #define ixDIDT_TCP_CTRL0 … macro
H A Dgc_10_1_0_offset.h11335 #define ixDIDT_TCP_CTRL0 … macro
H A Dgc_10_3_0_offset.h13569 #define ixDIDT_TCP_CTRL0 … macro