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Searched refs:ixAZF0STREAM5_AZALIA_WORSTCASE_LATENCY_COUNT (Results 1 – 17 of 17) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_0_3_offset.h7561 #define ixAZF0STREAM5_AZALIA_WORSTCASE_LATENCY_COUNT … macro
H A Ddcn_3_0_1_offset.h12360 #define ixAZF0STREAM5_AZALIA_WORSTCASE_LATENCY_COUNT … macro
H A Ddcn_1_0_offset.h13204 #define ixAZF0STREAM5_AZALIA_WORSTCASE_LATENCY_COUNT … macro
H A Ddcn_2_1_0_offset.h12964 #define ixAZF0STREAM5_AZALIA_WORSTCASE_LATENCY_COUNT … macro
H A Ddcn_3_2_0_offset.h13731 #define ixAZF0STREAM5_AZALIA_WORSTCASE_LATENCY_COUNT … macro
H A Ddcn_3_1_5_offset.h14284 #define ixAZF0STREAM5_AZALIA_WORSTCASE_LATENCY_COUNT … macro
H A Ddcn_3_5_1_offset.h207 #define ixAZF0STREAM5_AZALIA_WORSTCASE_LATENCY_COUNT … macro
H A Ddcn_3_5_0_offset.h228 #define ixAZF0STREAM5_AZALIA_WORSTCASE_LATENCY_COUNT … macro
H A Ddcn_3_1_4_offset.h275 #define ixAZF0STREAM5_AZALIA_WORSTCASE_LATENCY_COUNT … macro
H A Ddcn_3_1_2_offset.h14178 #define ixAZF0STREAM5_AZALIA_WORSTCASE_LATENCY_COUNT … macro
H A Ddcn_3_2_1_offset.h13685 #define ixAZF0STREAM5_AZALIA_WORSTCASE_LATENCY_COUNT … macro
H A Ddcn_3_1_6_offset.h14775 #define ixAZF0STREAM5_AZALIA_WORSTCASE_LATENCY_COUNT … macro
H A Ddcn_3_0_2_offset.h15363 #define ixAZF0STREAM5_AZALIA_WORSTCASE_LATENCY_COUNT … macro
H A Ddcn_4_1_0_offset.h15741 #define ixAZF0STREAM5_AZALIA_WORSTCASE_LATENCY_COUNT … macro
H A Ddcn_2_0_0_offset.h16628 #define ixAZF0STREAM5_AZALIA_WORSTCASE_LATENCY_COUNT … macro
H A Ddcn_3_0_0_offset.h17112 #define ixAZF0STREAM5_AZALIA_WORSTCASE_LATENCY_COUNT … macro
/linux/drivers/gpu/drm/amd/include/asic_reg/dce/
H A Ddce_12_0_offset.h17017 #define ixAZF0STREAM5_AZALIA_WORSTCASE_LATENCY_COUNT … macro