Home
last modified time | relevance | path

Searched refs:ixAZF0STREAM4_AZALIA_LATENCY_COUNTER_CONTROL (Results 1 – 17 of 17) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_0_3_offset.h7551 #define ixAZF0STREAM4_AZALIA_LATENCY_COUNTER_CONTROL macro
H A Ddcn_3_0_1_offset.h12350 #define ixAZF0STREAM4_AZALIA_LATENCY_COUNTER_CONTROL macro
H A Ddcn_1_0_offset.h13194 #define ixAZF0STREAM4_AZALIA_LATENCY_COUNTER_CONTROL macro
H A Ddcn_2_1_0_offset.h12954 #define ixAZF0STREAM4_AZALIA_LATENCY_COUNTER_CONTROL macro
H A Ddcn_3_2_0_offset.h13721 #define ixAZF0STREAM4_AZALIA_LATENCY_COUNTER_CONTROL macro
H A Ddcn_3_1_5_offset.h14274 #define ixAZF0STREAM4_AZALIA_LATENCY_COUNTER_CONTROL macro
H A Ddcn_3_5_1_offset.h197 #define ixAZF0STREAM4_AZALIA_LATENCY_COUNTER_CONTROL macro
H A Ddcn_3_5_0_offset.h218 #define ixAZF0STREAM4_AZALIA_LATENCY_COUNTER_CONTROL macro
H A Ddcn_3_1_4_offset.h265 #define ixAZF0STREAM4_AZALIA_LATENCY_COUNTER_CONTROL macro
H A Ddcn_3_1_2_offset.h14168 #define ixAZF0STREAM4_AZALIA_LATENCY_COUNTER_CONTROL macro
H A Ddcn_3_2_1_offset.h13675 #define ixAZF0STREAM4_AZALIA_LATENCY_COUNTER_CONTROL macro
H A Ddcn_3_1_6_offset.h14765 #define ixAZF0STREAM4_AZALIA_LATENCY_COUNTER_CONTROL macro
H A Ddcn_3_0_2_offset.h15353 #define ixAZF0STREAM4_AZALIA_LATENCY_COUNTER_CONTROL macro
H A Ddcn_4_1_0_offset.h15731 #define ixAZF0STREAM4_AZALIA_LATENCY_COUNTER_CONTROL macro
H A Ddcn_2_0_0_offset.h16618 #define ixAZF0STREAM4_AZALIA_LATENCY_COUNTER_CONTROL macro
H A Ddcn_3_0_0_offset.h17102 #define ixAZF0STREAM4_AZALIA_LATENCY_COUNTER_CONTROL macro
/linux/drivers/gpu/drm/amd/include/asic_reg/dce/
H A Ddce_12_0_offset.h17007 #define ixAZF0STREAM4_AZALIA_LATENCY_COUNTER_CONTROL macro