Home
last modified time | relevance | path

Searched refs:ixAZF0STREAM1_AZALIA_LATENCY_COUNTER_CONTROL (Results 1 – 17 of 17) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_0_3_offset.h7524 #define ixAZF0STREAM1_AZALIA_LATENCY_COUNTER_CONTROL … macro
H A Ddcn_3_0_1_offset.h12323 #define ixAZF0STREAM1_AZALIA_LATENCY_COUNTER_CONTROL … macro
H A Ddcn_1_0_offset.h13167 #define ixAZF0STREAM1_AZALIA_LATENCY_COUNTER_CONTROL … macro
H A Ddcn_2_1_0_offset.h12927 #define ixAZF0STREAM1_AZALIA_LATENCY_COUNTER_CONTROL … macro
H A Ddcn_3_2_0_offset.h13694 #define ixAZF0STREAM1_AZALIA_LATENCY_COUNTER_CONTROL … macro
H A Ddcn_3_1_5_offset.h14247 #define ixAZF0STREAM1_AZALIA_LATENCY_COUNTER_CONTROL … macro
H A Ddcn_3_5_1_offset.h170 #define ixAZF0STREAM1_AZALIA_LATENCY_COUNTER_CONTROL … macro
H A Ddcn_3_5_0_offset.h191 #define ixAZF0STREAM1_AZALIA_LATENCY_COUNTER_CONTROL … macro
H A Ddcn_3_1_4_offset.h238 #define ixAZF0STREAM1_AZALIA_LATENCY_COUNTER_CONTROL … macro
H A Ddcn_3_1_2_offset.h14141 #define ixAZF0STREAM1_AZALIA_LATENCY_COUNTER_CONTROL … macro
H A Ddcn_3_2_1_offset.h13648 #define ixAZF0STREAM1_AZALIA_LATENCY_COUNTER_CONTROL … macro
H A Ddcn_3_1_6_offset.h14738 #define ixAZF0STREAM1_AZALIA_LATENCY_COUNTER_CONTROL … macro
H A Ddcn_3_0_2_offset.h15326 #define ixAZF0STREAM1_AZALIA_LATENCY_COUNTER_CONTROL … macro
H A Ddcn_4_1_0_offset.h15704 #define ixAZF0STREAM1_AZALIA_LATENCY_COUNTER_CONTROL … macro
H A Ddcn_2_0_0_offset.h16591 #define ixAZF0STREAM1_AZALIA_LATENCY_COUNTER_CONTROL … macro
H A Ddcn_3_0_0_offset.h17076 #define ixAZF0STREAM1_AZALIA_LATENCY_COUNTER_CONTROL … macro
/linux/drivers/gpu/drm/amd/include/asic_reg/dce/
H A Ddce_12_0_offset.h16980 #define ixAZF0STREAM1_AZALIA_LATENCY_COUNTER_CONTROL … macro