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Searched refs:ixAZF0STREAM15_AZALIA_LATENCY_COUNTER_CONTROL (Results 1 – 17 of 17) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_0_3_offset.h7650 #define ixAZF0STREAM15_AZALIA_LATENCY_COUNTER_CONTROL … macro
H A Ddcn_3_0_1_offset.h12449 #define ixAZF0STREAM15_AZALIA_LATENCY_COUNTER_CONTROL … macro
H A Ddcn_1_0_offset.h13293 #define ixAZF0STREAM15_AZALIA_LATENCY_COUNTER_CONTROL … macro
H A Ddcn_2_1_0_offset.h13053 #define ixAZF0STREAM15_AZALIA_LATENCY_COUNTER_CONTROL … macro
H A Ddcn_3_2_0_offset.h13820 #define ixAZF0STREAM15_AZALIA_LATENCY_COUNTER_CONTROL … macro
H A Ddcn_3_1_5_offset.h14373 #define ixAZF0STREAM15_AZALIA_LATENCY_COUNTER_CONTROL … macro
H A Ddcn_3_5_1_offset.h296 #define ixAZF0STREAM15_AZALIA_LATENCY_COUNTER_CONTROL … macro
H A Ddcn_3_5_0_offset.h317 #define ixAZF0STREAM15_AZALIA_LATENCY_COUNTER_CONTROL … macro
H A Ddcn_3_1_4_offset.h364 #define ixAZF0STREAM15_AZALIA_LATENCY_COUNTER_CONTROL … macro
H A Ddcn_3_1_2_offset.h14267 #define ixAZF0STREAM15_AZALIA_LATENCY_COUNTER_CONTROL … macro
H A Ddcn_3_2_1_offset.h13774 #define ixAZF0STREAM15_AZALIA_LATENCY_COUNTER_CONTROL … macro
H A Ddcn_3_1_6_offset.h14864 #define ixAZF0STREAM15_AZALIA_LATENCY_COUNTER_CONTROL … macro
H A Ddcn_3_0_2_offset.h15452 #define ixAZF0STREAM15_AZALIA_LATENCY_COUNTER_CONTROL … macro
H A Ddcn_4_1_0_offset.h15830 #define ixAZF0STREAM15_AZALIA_LATENCY_COUNTER_CONTROL … macro
H A Ddcn_2_0_0_offset.h16717 #define ixAZF0STREAM15_AZALIA_LATENCY_COUNTER_CONTROL … macro
H A Ddcn_3_0_0_offset.h17201 #define ixAZF0STREAM15_AZALIA_LATENCY_COUNTER_CONTROL … macro
/linux/drivers/gpu/drm/amd/include/asic_reg/dce/
H A Ddce_12_0_offset.h17106 #define ixAZF0STREAM15_AZALIA_LATENCY_COUNTER_CONTROL … macro