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Searched refs:ixAZF0STREAM10_AZALIA_LATENCY_COUNTER_CONTROL (Results 1 – 17 of 17) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_0_3_offset.h7605 #define ixAZF0STREAM10_AZALIA_LATENCY_COUNTER_CONTROL … macro
H A Ddcn_3_0_1_offset.h12404 #define ixAZF0STREAM10_AZALIA_LATENCY_COUNTER_CONTROL … macro
H A Ddcn_1_0_offset.h13248 #define ixAZF0STREAM10_AZALIA_LATENCY_COUNTER_CONTROL … macro
H A Ddcn_2_1_0_offset.h13008 #define ixAZF0STREAM10_AZALIA_LATENCY_COUNTER_CONTROL … macro
H A Ddcn_3_2_0_offset.h13775 #define ixAZF0STREAM10_AZALIA_LATENCY_COUNTER_CONTROL … macro
H A Ddcn_3_1_5_offset.h14328 #define ixAZF0STREAM10_AZALIA_LATENCY_COUNTER_CONTROL … macro
H A Ddcn_3_5_1_offset.h251 #define ixAZF0STREAM10_AZALIA_LATENCY_COUNTER_CONTROL … macro
H A Ddcn_3_5_0_offset.h272 #define ixAZF0STREAM10_AZALIA_LATENCY_COUNTER_CONTROL … macro
H A Ddcn_3_1_4_offset.h319 #define ixAZF0STREAM10_AZALIA_LATENCY_COUNTER_CONTROL … macro
H A Ddcn_3_1_2_offset.h14222 #define ixAZF0STREAM10_AZALIA_LATENCY_COUNTER_CONTROL … macro
H A Ddcn_3_2_1_offset.h13729 #define ixAZF0STREAM10_AZALIA_LATENCY_COUNTER_CONTROL … macro
H A Ddcn_3_1_6_offset.h14819 #define ixAZF0STREAM10_AZALIA_LATENCY_COUNTER_CONTROL … macro
H A Ddcn_3_0_2_offset.h15407 #define ixAZF0STREAM10_AZALIA_LATENCY_COUNTER_CONTROL … macro
H A Ddcn_4_1_0_offset.h15785 #define ixAZF0STREAM10_AZALIA_LATENCY_COUNTER_CONTROL … macro
H A Ddcn_2_0_0_offset.h16672 #define ixAZF0STREAM10_AZALIA_LATENCY_COUNTER_CONTROL … macro
H A Ddcn_3_0_0_offset.h17156 #define ixAZF0STREAM10_AZALIA_LATENCY_COUNTER_CONTROL … macro
/linux/drivers/gpu/drm/amd/include/asic_reg/dce/
H A Ddce_12_0_offset.h17061 #define ixAZF0STREAM10_AZALIA_LATENCY_COUNTER_CONTROL … macro