Home
last modified time | relevance | path

Searched refs:ixAZALIA_F2_CODEC_PIN_CONTROL_MULTICHANNEL45_ENABLE (Results 1 – 22 of 22) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/dce/
H A Ddce_6_0_d.h156 #define ixAZALIA_F2_CODEC_PIN_CONTROL_MULTICHANNEL45_ENABLE 0x3779 macro
H A Ddce_8_0_d.h5385 #define ixAZALIA_F2_CODEC_PIN_CONTROL_MULTICHANNEL45_ENABLE 0x3779 macro
H A Ddce_10_0_d.h6619 #define ixAZALIA_F2_CODEC_PIN_CONTROL_MULTICHANNEL45_ENABLE 0x3779 macro
H A Ddce_11_0_d.h6781 #define ixAZALIA_F2_CODEC_PIN_CONTROL_MULTICHANNEL45_ENABLE 0x3779 macro
H A Ddce_11_2_d.h8126 #define ixAZALIA_F2_CODEC_PIN_CONTROL_MULTICHANNEL45_ENABLE 0x3779 macro
H A Ddce_12_0_offset.h17971 #define ixAZALIA_F2_CODEC_PIN_CONTROL_MULTICHANNEL45_ENABLE macro
/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_0_3_offset.h7330 #define ixAZALIA_F2_CODEC_PIN_CONTROL_MULTICHANNEL45_ENABLE macro
H A Ddcn_3_0_1_offset.h12129 #define ixAZALIA_F2_CODEC_PIN_CONTROL_MULTICHANNEL45_ENABLE macro
H A Ddcn_1_0_offset.h12973 #define ixAZALIA_F2_CODEC_PIN_CONTROL_MULTICHANNEL45_ENABLE macro
H A Ddcn_2_1_0_offset.h12733 #define ixAZALIA_F2_CODEC_PIN_CONTROL_MULTICHANNEL45_ENABLE macro
H A Ddcn_3_2_0_offset.h13500 #define ixAZALIA_F2_CODEC_PIN_CONTROL_MULTICHANNEL45_ENABLE macro
H A Ddcn_3_1_5_offset.h14053 #define ixAZALIA_F2_CODEC_PIN_CONTROL_MULTICHANNEL45_ENABLE macro
H A Ddcn_3_5_1_offset.h1435 #define ixAZALIA_F2_CODEC_PIN_CONTROL_MULTICHANNEL45_ENABLE macro
H A Ddcn_3_5_0_offset.h1456 #define ixAZALIA_F2_CODEC_PIN_CONTROL_MULTICHANNEL45_ENABLE macro
H A Ddcn_3_1_4_offset.h1600 #define ixAZALIA_F2_CODEC_PIN_CONTROL_MULTICHANNEL45_ENABLE macro
H A Ddcn_3_1_2_offset.h13947 #define ixAZALIA_F2_CODEC_PIN_CONTROL_MULTICHANNEL45_ENABLE macro
H A Ddcn_3_2_1_offset.h13454 #define ixAZALIA_F2_CODEC_PIN_CONTROL_MULTICHANNEL45_ENABLE macro
H A Ddcn_3_1_6_offset.h14544 #define ixAZALIA_F2_CODEC_PIN_CONTROL_MULTICHANNEL45_ENABLE macro
H A Ddcn_3_0_2_offset.h15132 #define ixAZALIA_F2_CODEC_PIN_CONTROL_MULTICHANNEL45_ENABLE macro
H A Ddcn_4_1_0_offset.h15510 #define ixAZALIA_F2_CODEC_PIN_CONTROL_MULTICHANNEL45_ENABLE macro
H A Ddcn_2_0_0_offset.h16397 #define ixAZALIA_F2_CODEC_PIN_CONTROL_MULTICHANNEL45_ENABLE macro
H A Ddcn_3_0_0_offset.h16882 #define ixAZALIA_F2_CODEC_PIN_CONTROL_MULTICHANNEL45_ENABLE macro