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Searched refs:ixAZALIA_CRC1_CHANNEL7 (Results 1 – 21 of 21) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/dce/
H A Ddce_8_0_d.h5470 #define ixAZALIA_CRC1_CHANNEL7 0x7 macro
H A Ddce_10_0_d.h6741 #define ixAZALIA_CRC1_CHANNEL7 0x7 macro
H A Ddce_11_0_d.h6903 #define ixAZALIA_CRC1_CHANNEL7 0x7 macro
H A Ddce_11_2_d.h8248 #define ixAZALIA_CRC1_CHANNEL7 0x7 macro
H A Ddce_12_0_offset.h18127 #define ixAZALIA_CRC1_CHANNEL7 … macro
/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_0_3_offset.h7454 #define ixAZALIA_CRC1_CHANNEL7 … macro
H A Ddcn_3_0_1_offset.h12253 #define ixAZALIA_CRC1_CHANNEL7 … macro
H A Ddcn_1_0_offset.h13097 #define ixAZALIA_CRC1_CHANNEL7 … macro
H A Ddcn_2_1_0_offset.h12857 #define ixAZALIA_CRC1_CHANNEL7 … macro
H A Ddcn_3_2_0_offset.h13624 #define ixAZALIA_CRC1_CHANNEL7 … macro
H A Ddcn_3_1_5_offset.h14177 #define ixAZALIA_CRC1_CHANNEL7 … macro
H A Ddcn_3_5_1_offset.h155 #define ixAZALIA_CRC1_CHANNEL7 … macro
H A Ddcn_3_5_0_offset.h176 #define ixAZALIA_CRC1_CHANNEL7 … macro
H A Ddcn_3_1_4_offset.h223 #define ixAZALIA_CRC1_CHANNEL7 … macro
H A Ddcn_3_1_2_offset.h14071 #define ixAZALIA_CRC1_CHANNEL7 … macro
H A Ddcn_3_2_1_offset.h13578 #define ixAZALIA_CRC1_CHANNEL7 … macro
H A Ddcn_3_1_6_offset.h14668 #define ixAZALIA_CRC1_CHANNEL7 … macro
H A Ddcn_3_0_2_offset.h15256 #define ixAZALIA_CRC1_CHANNEL7 … macro
H A Ddcn_4_1_0_offset.h15634 #define ixAZALIA_CRC1_CHANNEL7 … macro
H A Ddcn_2_0_0_offset.h16521 #define ixAZALIA_CRC1_CHANNEL7 … macro
H A Ddcn_3_0_0_offset.h17006 #define ixAZALIA_CRC1_CHANNEL7 … macro