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Searched refs:ixAZALIA_CRC1_CHANNEL3 (Results 1 – 21 of 21) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/dce/
H A Ddce_8_0_d.h5466 #define ixAZALIA_CRC1_CHANNEL3 0x3 macro
H A Ddce_10_0_d.h6737 #define ixAZALIA_CRC1_CHANNEL3 0x3 macro
H A Ddce_11_0_d.h6899 #define ixAZALIA_CRC1_CHANNEL3 0x3 macro
H A Ddce_11_2_d.h8244 #define ixAZALIA_CRC1_CHANNEL3 0x3 macro
H A Ddce_12_0_offset.h18123 #define ixAZALIA_CRC1_CHANNEL3 … macro
/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_0_3_offset.h7450 #define ixAZALIA_CRC1_CHANNEL3 … macro
H A Ddcn_3_0_1_offset.h12249 #define ixAZALIA_CRC1_CHANNEL3 … macro
H A Ddcn_1_0_offset.h13093 #define ixAZALIA_CRC1_CHANNEL3 … macro
H A Ddcn_2_1_0_offset.h12853 #define ixAZALIA_CRC1_CHANNEL3 … macro
H A Ddcn_3_2_0_offset.h13620 #define ixAZALIA_CRC1_CHANNEL3 … macro
H A Ddcn_3_1_5_offset.h14173 #define ixAZALIA_CRC1_CHANNEL3 … macro
H A Ddcn_3_5_1_offset.h151 #define ixAZALIA_CRC1_CHANNEL3 … macro
H A Ddcn_3_5_0_offset.h172 #define ixAZALIA_CRC1_CHANNEL3 … macro
H A Ddcn_3_1_4_offset.h219 #define ixAZALIA_CRC1_CHANNEL3 … macro
H A Ddcn_3_1_2_offset.h14067 #define ixAZALIA_CRC1_CHANNEL3 … macro
H A Ddcn_3_2_1_offset.h13574 #define ixAZALIA_CRC1_CHANNEL3 … macro
H A Ddcn_3_1_6_offset.h14664 #define ixAZALIA_CRC1_CHANNEL3 … macro
H A Ddcn_3_0_2_offset.h15252 #define ixAZALIA_CRC1_CHANNEL3 … macro
H A Ddcn_4_1_0_offset.h15630 #define ixAZALIA_CRC1_CHANNEL3 … macro
H A Ddcn_2_0_0_offset.h16517 #define ixAZALIA_CRC1_CHANNEL3 … macro
H A Ddcn_3_0_0_offset.h17002 #define ixAZALIA_CRC1_CHANNEL3 … macro