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Searched refs:ixAZALIA_CRC1_CHANNEL2 (Results 1 – 21 of 21) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/dce/
H A Ddce_8_0_d.h5465 #define ixAZALIA_CRC1_CHANNEL2 0x2 macro
H A Ddce_10_0_d.h6736 #define ixAZALIA_CRC1_CHANNEL2 0x2 macro
H A Ddce_11_0_d.h6898 #define ixAZALIA_CRC1_CHANNEL2 0x2 macro
H A Ddce_11_2_d.h8243 #define ixAZALIA_CRC1_CHANNEL2 0x2 macro
H A Ddce_12_0_offset.h18122 #define ixAZALIA_CRC1_CHANNEL2 … macro
/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_0_3_offset.h7449 #define ixAZALIA_CRC1_CHANNEL2 … macro
H A Ddcn_3_0_1_offset.h12248 #define ixAZALIA_CRC1_CHANNEL2 … macro
H A Ddcn_1_0_offset.h13092 #define ixAZALIA_CRC1_CHANNEL2 … macro
H A Ddcn_2_1_0_offset.h12852 #define ixAZALIA_CRC1_CHANNEL2 … macro
H A Ddcn_3_2_0_offset.h13619 #define ixAZALIA_CRC1_CHANNEL2 … macro
H A Ddcn_3_1_5_offset.h14172 #define ixAZALIA_CRC1_CHANNEL2 … macro
H A Ddcn_3_5_1_offset.h150 #define ixAZALIA_CRC1_CHANNEL2 … macro
H A Ddcn_3_5_0_offset.h171 #define ixAZALIA_CRC1_CHANNEL2 … macro
H A Ddcn_3_1_4_offset.h218 #define ixAZALIA_CRC1_CHANNEL2 … macro
H A Ddcn_3_1_2_offset.h14066 #define ixAZALIA_CRC1_CHANNEL2 … macro
H A Ddcn_3_2_1_offset.h13573 #define ixAZALIA_CRC1_CHANNEL2 … macro
H A Ddcn_3_1_6_offset.h14663 #define ixAZALIA_CRC1_CHANNEL2 … macro
H A Ddcn_3_0_2_offset.h15251 #define ixAZALIA_CRC1_CHANNEL2 … macro
H A Ddcn_4_1_0_offset.h15629 #define ixAZALIA_CRC1_CHANNEL2 … macro
H A Ddcn_2_0_0_offset.h16516 #define ixAZALIA_CRC1_CHANNEL2 … macro
H A Ddcn_3_0_0_offset.h17001 #define ixAZALIA_CRC1_CHANNEL2 … macro