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Searched refs:ixAZALIA_CRC0_CHANNEL7 (Results 1 – 21 of 21) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/dce/
H A Ddce_8_0_d.h5457 #define ixAZALIA_CRC0_CHANNEL7 0x7 macro
H A Ddce_10_0_d.h6728 #define ixAZALIA_CRC0_CHANNEL7 0x7 macro
H A Ddce_11_0_d.h6890 #define ixAZALIA_CRC0_CHANNEL7 0x7 macro
H A Ddce_11_2_d.h8235 #define ixAZALIA_CRC0_CHANNEL7 0x7 macro
H A Ddce_12_0_offset.h18115 #define ixAZALIA_CRC0_CHANNEL7 … macro
/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_0_3_offset.h7442 #define ixAZALIA_CRC0_CHANNEL7 … macro
H A Ddcn_3_0_1_offset.h12241 #define ixAZALIA_CRC0_CHANNEL7 … macro
H A Ddcn_1_0_offset.h13085 #define ixAZALIA_CRC0_CHANNEL7 … macro
H A Ddcn_2_1_0_offset.h12845 #define ixAZALIA_CRC0_CHANNEL7 … macro
H A Ddcn_3_2_0_offset.h13612 #define ixAZALIA_CRC0_CHANNEL7 … macro
H A Ddcn_3_1_5_offset.h14165 #define ixAZALIA_CRC0_CHANNEL7 … macro
H A Ddcn_3_5_1_offset.h143 #define ixAZALIA_CRC0_CHANNEL7 … macro
H A Ddcn_3_5_0_offset.h164 #define ixAZALIA_CRC0_CHANNEL7 … macro
H A Ddcn_3_1_4_offset.h211 #define ixAZALIA_CRC0_CHANNEL7 … macro
H A Ddcn_3_1_2_offset.h14059 #define ixAZALIA_CRC0_CHANNEL7 … macro
H A Ddcn_3_2_1_offset.h13566 #define ixAZALIA_CRC0_CHANNEL7 … macro
H A Ddcn_3_1_6_offset.h14656 #define ixAZALIA_CRC0_CHANNEL7 … macro
H A Ddcn_3_0_2_offset.h15244 #define ixAZALIA_CRC0_CHANNEL7 … macro
H A Ddcn_4_1_0_offset.h15622 #define ixAZALIA_CRC0_CHANNEL7 … macro
H A Ddcn_2_0_0_offset.h16509 #define ixAZALIA_CRC0_CHANNEL7 … macro
H A Ddcn_3_0_0_offset.h16994 #define ixAZALIA_CRC0_CHANNEL7 … macro