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Searched refs:ixAZALIA_CRC0_CHANNEL1 (Results 1 – 21 of 21) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/dce/
H A Ddce_8_0_d.h5451 #define ixAZALIA_CRC0_CHANNEL1 0x1 macro
H A Ddce_10_0_d.h6722 #define ixAZALIA_CRC0_CHANNEL1 0x1 macro
H A Ddce_11_0_d.h6884 #define ixAZALIA_CRC0_CHANNEL1 0x1 macro
H A Ddce_11_2_d.h8229 #define ixAZALIA_CRC0_CHANNEL1 0x1 macro
H A Ddce_12_0_offset.h18109 #define ixAZALIA_CRC0_CHANNEL1 … macro
/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_0_3_offset.h7436 #define ixAZALIA_CRC0_CHANNEL1 … macro
H A Ddcn_3_0_1_offset.h12235 #define ixAZALIA_CRC0_CHANNEL1 … macro
H A Ddcn_1_0_offset.h13079 #define ixAZALIA_CRC0_CHANNEL1 … macro
H A Ddcn_2_1_0_offset.h12839 #define ixAZALIA_CRC0_CHANNEL1 … macro
H A Ddcn_3_2_0_offset.h13606 #define ixAZALIA_CRC0_CHANNEL1 … macro
H A Ddcn_3_1_5_offset.h14159 #define ixAZALIA_CRC0_CHANNEL1 … macro
H A Ddcn_3_5_1_offset.h137 #define ixAZALIA_CRC0_CHANNEL1 … macro
H A Ddcn_3_5_0_offset.h158 #define ixAZALIA_CRC0_CHANNEL1 … macro
H A Ddcn_3_1_4_offset.h205 #define ixAZALIA_CRC0_CHANNEL1 … macro
H A Ddcn_3_1_2_offset.h14053 #define ixAZALIA_CRC0_CHANNEL1 … macro
H A Ddcn_3_2_1_offset.h13560 #define ixAZALIA_CRC0_CHANNEL1 … macro
H A Ddcn_3_1_6_offset.h14650 #define ixAZALIA_CRC0_CHANNEL1 … macro
H A Ddcn_3_0_2_offset.h15238 #define ixAZALIA_CRC0_CHANNEL1 … macro
H A Ddcn_4_1_0_offset.h15616 #define ixAZALIA_CRC0_CHANNEL1 … macro
H A Ddcn_2_0_0_offset.h16503 #define ixAZALIA_CRC0_CHANNEL1 … macro
H A Ddcn_3_0_0_offset.h16988 #define ixAZALIA_CRC0_CHANNEL1 … macro