Searched refs:is_cxl_root (Results 1 – 7 of 7) sorted by relevance
70 if (is_cxl_root(to_cxl_port(dev))) in cxl_device_id()556 if (is_cxl_root(port)) { in cxl_port_release()723 !is_cxl_root(to_cxl_port(iter->dev.parent))) in cxl_port_alloc()827 !(dev_is_pci(dport->dport_dev) && parent && is_cxl_root(parent))) in cxl_debugfs_create_dport_dir()965 if (is_cxl_root(port)) in cxl_port_to_pci_bus()1007 if (is_cxl_root(port)) in dev_is_cxl_root_child()1011 if (is_cxl_root(parent)) in dev_is_cxl_root_child()1021 while (iter && !is_cxl_root(iter)) in find_cxl_root()1080 if (is_cxl_root(port)) in cond_cxl_root_lock()1086 if (is_cxl_root(port)) in cond_cxl_root_unlock()[all …]
159 struct cxl_port *parent = is_cxl_root(port) ? NULL : in port_to_host()169 else if (is_cxl_root(parent)) in port_to_host()179 if (is_cxl_root(port)) in dport_to_host()
271 while (!is_cxl_root(to_cxl_port(iter->dev.parent))) in cxl_region_decode_reset()325 for (iter = cxled_to_port(cxled); !is_cxl_root(iter); in cxl_region_decode_commit()1473 } while (!is_cxl_root(iter)); in cxl_port_setup_targets()1487 if (is_cxl_root(parent_port)) { in cxl_port_setup_targets()1680 while (!is_cxl_root(to_cxl_port(iter->dev.parent))) in cxl_region_teardown_targets()1713 while (!is_cxl_root(to_cxl_port(iter->dev.parent))) in cxl_region_setup_targets()1806 for (iter = cxled_to_port(cxled); !is_cxl_root(iter); in cxl_region_attach_position()1816 for (iter = cxled_to_port(cxled); !is_cxl_root(iter); in cxl_region_attach_position()1984 if (is_cxl_root(iter)) in cxl_calc_interleave_pos()2284 for (struct cxl_port *iter = cxled_to_port(cxled); !is_cxl_root(iter); in __cxl_decoder_detach()
658 *gp_is_root = is_cxl_root(gp_port); in cxl_endpoint_gather_bandwidth()781 if (is_cxl_root(gp_port)) { in DEFINE_FREE()
1223 if (is_cxl_root(port) || is_cxl_endpoint(port)) in devm_cxl_switch_port_decoders_setup()
680 static inline bool is_cxl_root(struct cxl_port *port) in is_cxl_root() function
1232 else if (is_cxl_root(parent_port)) in cxl_single_topo_init() 1310 if (is_cxl_root(port) || is_cxl_endpoint(port)) in cxl_single_topo_init()