Searched refs:irs_base (Results 1 – 2 of 2) sorted by relevance
| /linux/drivers/irqchip/ |
| H A D | irq-gic-v5-irs.c | 31 return readl_relaxed(irs_data->irs_base + reg_offset); in irs_readl_relaxed()
37 writel_relaxed(val, irs_data->irs_base + reg_offset); in irs_writel_relaxed()
43 return readq_relaxed(irs_data->irs_base + reg_offset); in irs_readq_relaxed()
49 writeq_relaxed(val, irs_data->irs_base + reg_offset); in irs_writeq_relaxed()
59 return gicv5_wait_for_op_atomic(irs_data->irs_base, GICV5_IRS_IST_STATUSR, in gicv5_irs_ist_synchronise()
409 ret = gicv5_wait_for_op_atomic(irs_data->irs_base, GICV5_IRS_SPI_STATUSR, in gicv5_irs_wait_for_spi_op()
424 ret = gicv5_wait_for_op_atomic(irs_data->irs_base, GICV5_IRS_PE_STATUSR, in gicv5_irs_wait_for_irs_pe()
486 return gicv5_wait_for_op_atomic(irs_data->irs_base, GICV5_IRS_CR0, in gicv5_irs_wait_for_idle()
502 gicv5_wait_for_op(irs_data->irs_base, GICV5_IRS_SYNC_STATUSR, in gicv5_irs_syncr()
547 void __iomem *irs_base, in gicv5_irs_init_bases() argument
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| /linux/include/linux/irqchip/ |
| H A D | arm-gic-v5.h | 294 void __iomem *irs_base; member
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