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Searched refs:irq_reg_writel (Results 1 – 15 of 15) sorted by relevance

/linux/drivers/irqchip/
H A Dirq-atmel-aic5.c80 irq_reg_writel(bgc, 0, AT91_AIC5_EOICR); in aic5_handle()
96 irq_reg_writel(gc, d->hwirq, AT91_AIC5_SSR); in aic5_mask()
97 irq_reg_writel(gc, 1, AT91_AIC5_IDCR); in aic5_mask()
113 irq_reg_writel(gc, d->hwirq, AT91_AIC5_SSR); in aic5_unmask()
114 irq_reg_writel(gc, 1, AT91_AIC5_IECR); in aic5_unmask()
126 irq_reg_writel(bgc, d->hwirq, AT91_AIC5_SSR); in aic5_retrigger()
127 irq_reg_writel(bgc, 1, AT91_AIC5_ISCR); in aic5_retrigger()
141 irq_reg_writel(bgc, d->hwirq, AT91_AIC5_SSR); in aic5_set_type()
145 irq_reg_writel(bgc, smr, AT91_AIC5_SMR); in aic5_set_type()
165 irq_reg_writel(bgc, i, AT91_AIC5_SSR); in aic5_suspend()
[all …]
H A Dirq-atmel-aic.c71 irq_reg_writel(gc, 0, AT91_AIC_EOICR); in aic_handle()
82 irq_reg_writel(gc, d->mask, AT91_AIC_ISCR); in aic_retrigger()
99 irq_reg_writel(gc, smr, AT91_AIC_SMR(d->hwirq)); in aic_set_type()
110 irq_reg_writel(gc, gc->mask_cache, AT91_AIC_IDCR); in aic_suspend()
111 irq_reg_writel(gc, gc->wake_active, AT91_AIC_IECR); in aic_suspend()
120 irq_reg_writel(gc, gc->wake_active, AT91_AIC_IDCR); in aic_resume()
121 irq_reg_writel(gc, gc->mask_cache, AT91_AIC_IECR); in aic_resume()
130 irq_reg_writel(gc, 0xffffffff, AT91_AIC_IDCR); in aic_pm_shutdown()
131 irq_reg_writel(gc, 0xffffffff, AT91_AIC_ICCR); in aic_pm_shutdown()
150 irq_reg_writel(gc, 0, AT91_AIC_EOICR); in aic_hw_init()
[all …]
H A Dirq-brcmstb-l2.c84 irq_reg_writel(gc, mask, ct->regs.disable); in brcmstb_l2_mask_and_ack()
86 irq_reg_writel(gc, mask, ct->regs.ack); in brcmstb_l2_mask_and_ack()
135 irq_reg_writel(gc, ~gc->wake_active, ct->regs.disable); in __brcmstb_l2_intc_suspend()
136 irq_reg_writel(gc, gc->wake_active, ct->regs.enable); in __brcmstb_l2_intc_suspend()
161 irq_reg_writel(gc, ~b->saved_mask & ~gc->wake_active, in brcmstb_l2_intc_resume()
166 irq_reg_writel(gc, b->saved_mask, ct->regs.disable); in brcmstb_l2_intc_resume()
167 irq_reg_writel(gc, ~b->saved_mask, ct->regs.enable); in brcmstb_l2_intc_resume()
H A Dirq-mscc-ocelot.c96 irq_reg_writel(gc, mask, p->reg_off_sticky); in ocelot_irq_unmask()
99 irq_reg_writel(gc, mask, p->reg_off_ena_set); in ocelot_irq_unmask()
172 irq_reg_writel(gc, 0, p->reg_off_ena); in vcoreiii_irq_init()
173 irq_reg_writel(gc, 0xffffffff, p->reg_off_sticky); in vcoreiii_irq_init()
177 irq_reg_writel(gc, BIT(0), p->reg_off_ena_irq0); in vcoreiii_irq_init()
H A Dirq-lan966x-oic.c79 irq_reg_writel(gc, map, chip_regs->reg_off_map); in lan966x_oic_irq_startup()
103 irq_reg_writel(gc, map, chip_regs->reg_off_map); in lan966x_oic_irq_shutdown()
188 irq_reg_writel(gc, ~0U, chip_regs->reg_off_ena_clr); in lan966x_oic_chip_init()
196 irq_reg_writel(gc, ~0U, gc->chip_types[0].regs.disable); in lan966x_oic_chip_exit()
197 irq_reg_writel(gc, ~0U, gc->chip_types[0].regs.ack); in lan966x_oic_chip_exit()
H A Dirq-bcm7120-l2.c91 irq_reg_writel(gc, gc->mask_cache | gc->wake_active, in bcm7120_l2_intc_suspend()
102 irq_reg_writel(gc, gc->mask_cache, ct->regs.mask); in bcm7120_l2_intc_resume()
301 irq_reg_writel(gc, data->irq_fwd_mask[idx], in bcm7120_l2_intc_probe()
H A Dirq-csky-apb-intc.c55 irq_reg_writel(gc, *ct->mask_cache, ct->regs.mask); in irq_ck_mask_set_bit()
56 irq_reg_writel(gc, irq_reg_readl(gc, ifr) & ~mask, ifr); in irq_ck_mask_set_bit()
H A Dirq-stm32-exti.c181 irq_reg_writel(gc, rtsr, stm32_bank->rtsr_ofst); in stm32_irq_set_type()
182 irq_reg_writel(gc, ftsr, stm32_bank->ftsr_ofst); in stm32_irq_set_type()
270 irq_reg_writel(gc, d->mask, stm32_bank->rpr_ofst); in stm32_irq_ack()
H A Dirq-ingenic.c124 irq_reg_writel(gc, IRQ_MSK(32), JZ_REG_INTC_SET_MASK); in ingenic_intc_of_init()
H A Dirq-tb10x.c33 irq_reg_writel(gc, val, reg); in ab_irqctl_writereg()
H A Dirq-sunxi-nmi.c78 irq_reg_writel(gc, val, off); in sunxi_sc_nmi_write()
/linux/kernel/irq/
H A Dgeneric-chip.c44 irq_reg_writel(gc, mask, ct->regs.disable); in irq_gc_mask_disable_reg()
65 irq_reg_writel(gc, *ct->mask_cache, ct->regs.mask); in irq_gc_mask_set_bit()
85 irq_reg_writel(gc, *ct->mask_cache, ct->regs.mask); in irq_gc_mask_clr_bit()
104 irq_reg_writel(gc, mask, ct->regs.enable); in irq_gc_unmask_enable_reg()
121 irq_reg_writel(gc, mask, ct->regs.ack); in irq_gc_ack_set_bit()
137 irq_reg_writel(gc, mask, ct->regs.ack); in irq_gc_ack_clr_bit()
160 irq_reg_writel(gc, mask, ct->regs.disable); in irq_gc_mask_disable_and_ack_set()
162 irq_reg_writel(gc, mask, ct->regs.ack); in irq_gc_mask_disable_and_ack_set()
177 irq_reg_writel(gc, mask, ct->regs.eoi); in irq_gc_eoi()
/linux/arch/arm/plat-orion/
H A Dgpio.c502 irq_reg_writel(gc, reg_val, ct->regs.mask); in orion_gpio_unmask_irq()
516 irq_reg_writel(gc, reg_val, ct->regs.mask); in orion_gpio_mask_irq()
/linux/drivers/gpio/
H A Dgpio-rockchip.c490 irq_reg_writel(gc, ~gc->wake_active, bank->gpio_regs->int_mask); in rockchip_irq_suspend()
498 irq_reg_writel(gc, bank->saved_masks, bank->gpio_regs->int_mask); in rockchip_irq_resume()
/linux/include/linux/
H A Dirq.h1252 static inline void irq_reg_writel(struct irq_chip_generic *gc, in irq_reg_writel() function