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Searched refs:io_base (Results 1 – 25 of 104) sorted by relevance

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/linux/drivers/gpu/drm/meson/
H A Dmeson_viu.c86 priv->io_base + _REG(VPP_WRAP_OSD1_MATRIX_PRE_OFFSET0_1)); in meson_viu_set_g12a_osd1_matrix()
88 priv->io_base + _REG(VPP_WRAP_OSD1_MATRIX_PRE_OFFSET2)); in meson_viu_set_g12a_osd1_matrix()
90 priv->io_base + _REG(VPP_WRAP_OSD1_MATRIX_COEF00_01)); in meson_viu_set_g12a_osd1_matrix()
92 priv->io_base + _REG(VPP_WRAP_OSD1_MATRIX_COEF02_10)); in meson_viu_set_g12a_osd1_matrix()
94 priv->io_base + _REG(VPP_WRAP_OSD1_MATRIX_COEF11_12)); in meson_viu_set_g12a_osd1_matrix()
96 priv->io_base + _REG(VPP_WRAP_OSD1_MATRIX_COEF20_21)); in meson_viu_set_g12a_osd1_matrix()
98 priv->io_base + _REG(VPP_WRAP_OSD1_MATRIX_COEF22)); in meson_viu_set_g12a_osd1_matrix()
101 priv->io_base + _REG(VPP_WRAP_OSD1_MATRIX_OFFSET0_1)); in meson_viu_set_g12a_osd1_matrix()
103 priv->io_base + _REG(VPP_WRAP_OSD1_MATRIX_OFFSET2)); in meson_viu_set_g12a_osd1_matrix()
106 priv->io_base + _REG(VPP_WRAP_OSD1_MATRIX_EN_CTRL)); in meson_viu_set_g12a_osd1_matrix()
[all …]
H A Dmeson_vpp.c38 writel(mux, priv->io_base + _REG(VPU_VIU_VENC_MUX_CTRL)); in meson_vpp_setup_mux()
60 priv->io_base + _REG(VPP_OSD_SCALE_COEF_IDX)); in meson_vpp_write_scaling_filter_coefs()
63 priv->io_base + _REG(VPP_OSD_SCALE_COEF)); in meson_vpp_write_scaling_filter_coefs()
85 priv->io_base + _REG(VPP_SCALE_COEF_IDX)); in meson_vpp_write_vd_scaling_filter_coefs()
88 priv->io_base + _REG(VPP_SCALE_COEF)); in meson_vpp_write_vd_scaling_filter_coefs()
95 writel_relaxed(0x108080, priv->io_base + _REG(VPP_DUMMY_DATA1)); in meson_vpp_init()
98 priv->io_base + _REG(VIU_MISC_CTRL1)); in meson_vpp_init()
100 priv->io_base + _REG(VPP_DOLBY_CTRL)); in meson_vpp_init()
102 priv->io_base + _REG(VPP_DUMMY_DATA1)); in meson_vpp_init()
104 priv->io_base + _REG(VPP_DUMMY_DATA)); in meson_vpp_init()
[all …]
H A Dmeson_rdma.c39 priv->io_base + _REG(RDMA_CTRL)); in meson_rdma_init()
43 priv->io_base + _REG(RDMA_CTRL)); in meson_rdma_init()
68 priv->io_base + _REG(RDMA_ACCESS_AUTO)); in meson_rdma_setup()
75 priv->io_base + _REG(RDMA_CTRL)); in meson_rdma_stop()
81 priv->io_base + _REG(RDMA_ACCESS_AUTO)); in meson_rdma_stop()
113 writel_relaxed(val, priv->io_base + _REG(reg)); in meson_rdma_writel_sync()
122 priv->io_base + _REG(RDMA_AHB_START_ADDR_1)); in meson_rdma_flush()
126 priv->io_base + _REG(RDMA_AHB_END_ADDR_1)); in meson_rdma_flush()
132 priv->io_base + _REG(RDMA_ACCESS_AUTO)); in meson_rdma_flush()
H A Dmeson_osd_afbcd.c85 priv->io_base + _REG(VIU_SW_RESET)); in meson_gxm_afbcd_reset()
86 writel_relaxed(0, priv->io_base + _REG(VIU_SW_RESET)); in meson_gxm_afbcd_reset()
105 priv->io_base + _REG(OSD1_AFBCD_ENABLE)); in meson_gxm_afbcd_enable()
113 priv->io_base + _REG(OSD1_AFBCD_ENABLE)); in meson_gxm_afbcd_disable()
133 writel_relaxed(mode, priv->io_base + _REG(OSD1_AFBCD_MODE)); in meson_gxm_afbcd_setup()
139 priv->io_base + _REG(OSD1_AFBCD_SIZE_IN)); in meson_gxm_afbcd_setup()
142 priv->io_base + _REG(OSD1_AFBCD_HDR_PTR)); in meson_gxm_afbcd_setup()
144 priv->io_base + _REG(OSD1_AFBCD_FRAME_PTR)); in meson_gxm_afbcd_setup()
147 priv->io_base + _REG(OSD1_AFBCD_CHROMA_PTR)); in meson_gxm_afbcd_setup()
163 priv->io_base + _REG(OSD1_AFBCD_CONV_CTRL)); in meson_gxm_afbcd_setup()
[all …]
/linux/arch/powerpc/platforms/embedded6xx/
H A Dflipper-pic.c49 void __iomem *io_base = irq_data_get_irq_chip_data(d); in flipper_pic_mask_and_ack() local
52 clrbits32(io_base + FLIPPER_IMR, mask); in flipper_pic_mask_and_ack()
54 out_be32(io_base + FLIPPER_ICR, mask); in flipper_pic_mask_and_ack()
60 void __iomem *io_base = irq_data_get_irq_chip_data(d); in flipper_pic_ack() local
63 out_be32(io_base + FLIPPER_ICR, 1 << irq); in flipper_pic_ack()
69 void __iomem *io_base = irq_data_get_irq_chip_data(d); in flipper_pic_mask() local
71 clrbits32(io_base + FLIPPER_IMR, 1 << irq); in flipper_pic_mask()
77 void __iomem *io_base = irq_data_get_irq_chip_data(d); in flipper_pic_unmask() local
79 setbits32(io_base + FLIPPER_IMR, 1 << irq); in flipper_pic_unmask()
116 static void __flipper_quiesce(void __iomem *io_base) in __flipper_quiesce() argument
[all …]
/linux/drivers/watchdog/
H A Dni903x_wdt.c41 u16 io_base; member
59 u8 control = inb(wdt->io_base + NIWD_CONTROL); in ni903x_start()
61 outb(control | NIWD_CONTROL_RESET, wdt->io_base + NIWD_CONTROL); in ni903x_start()
62 outb(control | NIWD_CONTROL_PET, wdt->io_base + NIWD_CONTROL); in ni903x_start()
71 outb(((0x00FF0000 & counter) >> 16), wdt->io_base + NIWD_SEED2); in ni903x_wdd_set_timeout()
72 outb(((0x0000FF00 & counter) >> 8), wdt->io_base + NIWD_SEED1); in ni903x_wdd_set_timeout()
73 outb((0x000000FF & counter), wdt->io_base + NIWD_SEED0); in ni903x_wdd_set_timeout()
86 control = inb(wdt->io_base + NIWD_CONTROL); in ni903x_wdd_get_timeleft()
88 outb(control, wdt->io_base + NIWD_CONTROL); in ni903x_wdd_get_timeleft()
90 counter2 = inb(wdt->io_base + NIWD_COUNTER2); in ni903x_wdd_get_timeleft()
[all …]
H A Dnic7018_wdt.c46 u16 io_base; member
96 wdt->io_base + WDT_PRESET_PRESCALE); in nic7018_set_timeout()
111 control = inb(wdt->io_base + WDT_RELOAD_CTRL); in nic7018_start()
112 outb(control | WDT_RELOAD_PORT_EN, wdt->io_base + WDT_RELOAD_CTRL); in nic7018_start()
114 outb(1, wdt->io_base + WDT_RELOAD_PORT); in nic7018_start()
116 control = inb(wdt->io_base + WDT_CTRL); in nic7018_start()
117 outb(control | WDT_CTRL_RESET_EN, wdt->io_base + WDT_CTRL); in nic7018_start()
126 outb(0, wdt->io_base + WDT_CTRL); in nic7018_stop()
127 outb(0, wdt->io_base + WDT_RELOAD_CTRL); in nic7018_stop()
128 outb(0xF0, wdt->io_base + WDT_PRESET_PRESCALE); in nic7018_stop()
[all …]
H A Dtqmx86_wdt.c29 void __iomem *io_base; member
39 iowrite8(0x81, priv->io_base + TQMX86_WDCS); in tqmx86_wdt_start()
52 iowrite8(val, priv->io_base + TQMX86_WDCFG); in tqmx86_wdt_set_timeout()
86 priv->io_base = devm_ioport_map(dev, res->start, resource_size(res)); in tqmx86_wdt_probe()
87 if (!priv->io_base) in tqmx86_wdt_probe()
/linux/sound/soc/spear/
H A Dspdif_in.c35 void *io_base;
49 writel(ctrl, host->io_base + SPDIF_IN_CTRL); in spdif_in_configure()
50 writel(0xF, host->io_base + SPDIF_IN_IRQ_MASK); in spdif_in_configure()
71 writel(0x0, host->io_base + SPDIF_IN_IRQ_MASK); in spdif_in_shutdown()
76 u32 ctrl = readl(host->io_base + SPDIF_IN_CTRL);
88 writel(ctrl, host->io_base + SPDIF_IN_CTRL); in spdif_in_format()
125 ctrl = readl(host->io_base + SPDIF_IN_CTRL); in spdif_in_trigger()
127 writel(ctrl, host->io_base + SPDIF_IN_CTRL); in spdif_in_trigger()
128 writel(0xF, host->io_base + SPDIF_IN_IRQ_MASK); in spdif_in_trigger()
134 ctrl = readl(host->io_base in spdif_in_trigger()
38 void *io_base; global() member
207 void __iomem *io_base; spdif_in_probe() local
[all...]
H A Dspdif_out.c36 void __iomem *io_base;
43 writel(SPDIF_OUT_RESET, host->io_base + SPDIF_OUT_SOFT_RST);
45 writel(readl(host->io_base + SPDIF_OUT_SOFT_RST) & ~SPDIF_OUT_RESET, in spdif_out_configure()
46 host->io_base + SPDIF_OUT_SOFT_RST); in spdif_out_configure()
51 host->io_base + SPDIF_OUT_CFG); in spdif_out_configure()
53 writel(0x7F, host->io_base + SPDIF_OUT_INT_STA_CLR); in spdif_out_configure()
54 writel(0x7F, host->io_base + SPDIF_OUT_INT_EN_CLR); in spdif_out_configure()
96 ctrl = readl(host->io_base + SPDIF_OUT_CTRL); in spdif_out_clock()
99 writel(ctrl, host->io_base + SPDIF_OUT_CTRL); in spdif_out_clock()
162 ctrl = readl(host->io_base in spdif_out_trigger()
39 void __iomem *io_base; global() member
[all...]
/linux/drivers/crypto/intel/keembay/
H A Docs-hcu.c173 return readl_poll_timeout(hcu_dev->io_base + OCS_HCU_STATUS, val, in ocs_hcu_wait_busy()
182 writel(0xFFFFFFFF, hcu_dev->io_base + OCS_HCU_ISR); in ocs_hcu_done_irq_en()
186 hcu_dev->io_base + OCS_HCU_IER); in ocs_hcu_done_irq_en()
192 writel(0xFFFFFFFF, hcu_dev->io_base + OCS_HCU_DMA_MSI_ISR); in ocs_hcu_dma_irq_en()
196 hcu_dev->io_base + OCS_HCU_DMA_MSI_IER); in ocs_hcu_dma_irq_en()
198 writel(HCU_DMA_MSI_UNMASK, hcu_dev->io_base + OCS_HCU_DMA_MSI_MASK); in ocs_hcu_dma_irq_en()
203 writel(HCU_IRQ_DISABLE, hcu_dev->io_base + OCS_HCU_IER); in ocs_hcu_irq_dis()
204 writel(HCU_DMA_MSI_DISABLE, hcu_dev->io_base + OCS_HCU_DMA_MSI_IER); in ocs_hcu_irq_dis()
270 chain[i] = readl(hcu_dev->io_base + OCS_HCU_CHAIN); in ocs_hcu_get_intermediate_data()
272 data->msg_len_lo = readl(hcu_dev->io_base + OCS_HCU_MSG_LEN_LO); in ocs_hcu_get_intermediate_data()
[all …]
/linux/drivers/mtd/spi-nor/controllers/
H A Dnxp-spifi.c56 void __iomem *io_base; member
68 ret = readb_poll_timeout(spifi->io_base + SPIFI_STAT, stat, in nxp_spifi_wait_for_cmd()
81 writel(SPIFI_STAT_RESET, spifi->io_base + SPIFI_STAT); in nxp_spifi_reset()
82 ret = readb_poll_timeout(spifi->io_base + SPIFI_STAT, stat, in nxp_spifi_reset()
114 writel(spifi->mcmd, spifi->io_base + SPIFI_MCMD); in nxp_spifi_set_memory_mode_on()
115 ret = readb_poll_timeout(spifi->io_base + SPIFI_STAT, stat, in nxp_spifi_set_memory_mode_on()
140 writel(cmd, spifi->io_base + SPIFI_CMD); in nxp_spifi_read_reg()
143 *buf++ = readb(spifi->io_base + SPIFI_DATA); in nxp_spifi_read_reg()
164 writel(cmd, spifi->io_base + SPIFI_CMD); in nxp_spifi_write_reg()
167 writeb(*buf++, spifi->io_base + SPIFI_DATA); in nxp_spifi_write_reg()
[all …]
/linux/drivers/mtd/nand/raw/
H A Dlpc32xx_slc.c219 void __iomem *io_base; member
241 writel(SLCCTRL_SW_RESET, SLC_CTRL(host->io_base)); in lpc32xx_nand_setup()
245 writel(0, SLC_CFG(host->io_base)); in lpc32xx_nand_setup()
246 writel(0, SLC_IEN(host->io_base)); in lpc32xx_nand_setup()
248 SLC_ICR(host->io_base)); in lpc32xx_nand_setup()
264 writel(tmp, SLC_TAC(host->io_base)); in lpc32xx_nand_setup()
277 tmp = readl(SLC_CFG(host->io_base)); in lpc32xx_nand_cmd_ctrl()
282 writel(tmp, SLC_CFG(host->io_base)); in lpc32xx_nand_cmd_ctrl()
286 writel(cmd, SLC_CMD(host->io_base)); in lpc32xx_nand_cmd_ctrl()
288 writel(cmd, SLC_ADDR(host->io_base)); in lpc32xx_nand_cmd_ctrl()
[all …]
H A Dlpc32xx_mlc.c180 void __iomem *io_base; member
236 writel(MLCCMD_RESET, MLC_CMD(host->io_base)); in lpc32xx_nand_setup()
246 writew(MLCLOCKPR_MAGIC, MLC_LOCK_PR(host->io_base)); in lpc32xx_nand_setup()
250 writel(tmp, MLC_ICR(host->io_base)); in lpc32xx_nand_setup()
254 writew(MLCLOCKPR_MAGIC, MLC_LOCK_PR(host->io_base)); in lpc32xx_nand_setup()
265 writel(tmp, MLC_TIME_REG(host->io_base)); in lpc32xx_nand_setup()
269 MLC_IRQ_MR(host->io_base)); in lpc32xx_nand_setup()
272 writel(MLCCEH_NORMAL, MLC_CEH(host->io_base)); in lpc32xx_nand_setup()
285 writel(cmd, MLC_CMD(host->io_base)); in lpc32xx_nand_cmd_ctrl()
287 writel(cmd, MLC_ADDR(host->io_base)); in lpc32xx_nand_cmd_ctrl()
[all …]
H A Dsocrates_nand.c28 void __iomem *io_base; member
45 out_be32(host->io_base, FPGA_NAND_ENABLE | in socrates_nand_write_buf()
66 out_be32(host->io_base, val); in socrates_nand_read_buf()
68 buf[i] = (in_be32(host->io_base) >> in socrates_nand_read_buf()
106 out_be32(host->io_base, val); in socrates_nand_cmd_ctrl()
116 if (in_be32(host->io_base) & FPGA_NAND_BUSY) in socrates_nand_device_ready()
149 host->io_base = of_iomap(ofdev->dev.of_node, 0); in socrates_nand_probe()
150 if (host->io_base == NULL) { in socrates_nand_probe()
198 iounmap(host->io_base); in socrates_nand_probe()
215 iounmap(host->io_base); in socrates_nand_remove()
H A Dorion_nand.c54 void __iomem *io_base = chip->legacy.IO_ADDR_R; in orion_nand_read_buf() local
61 *buf++ = readb(io_base); in orion_nand_read_buf()
74 asm volatile ("ldrd\t%0, [%1]" : "=&r" (x) : "r" (io_base)); in orion_nand_read_buf()
79 readsl(io_base, buf, len/4); in orion_nand_read_buf()
83 buf[i++] = readb(io_base); in orion_nand_read_buf()
105 void __iomem *io_base; in orion_nand_probe() local
121 io_base = devm_platform_ioremap_resource(pdev, 0); in orion_nand_probe()
123 if (IS_ERR(io_base)) in orion_nand_probe()
124 return PTR_ERR(io_base); in orion_nand_probe()
155 nc->legacy.IO_ADDR_R = nc->legacy.IO_ADDR_W = io_base; in orion_nand_probe()
H A Dfsl_upm.c29 void __iomem *io_base; member
92 fsl_upm_run_pattern(&fun->upm, fun->io_base + reg_offs, mar); in func_exec_instr()
101 fsl_upm_run_pattern(&fun->upm, fun->io_base + reg_offs, mar); in func_exec_instr()
109 in[i] = in_8(fun->io_base + reg_offs); in func_exec_instr()
115 out_8(fun->io_base + reg_offs, out[i]); in func_exec_instr()
176 fun->io_base = devm_platform_get_and_ioremap_resource(ofdev, 0, &io_res); in fun_probe()
177 if (IS_ERR(fun->io_base)) in fun_probe()
178 return PTR_ERR(fun->io_base); in fun_probe()
/linux/drivers/mtd/devices/
H A Dspear_smi.c174 void __iomem *io_base; member
229 ctrlreg1 = readl(dev->io_base + SMI_CR1); in spear_smi_read_sr()
231 writel(ctrlreg1 & ~(SW_MODE | WB_MODE), dev->io_base + SMI_CR1); in spear_smi_read_sr()
235 dev->io_base + SMI_CR2); in spear_smi_read_sr()
248 writel(ctrlreg1, dev->io_base + SMI_CR1); in spear_smi_read_sr()
249 writel(0, dev->io_base + SMI_CR2); in spear_smi_read_sr()
301 status = readl(dev->io_base + SMI_SR); in spear_smi_int_handler()
307 writel(0, dev->io_base + SMI_SR); in spear_smi_int_handler()
343 writel(0, dev->io_base + SMI_SR); in spear_smi_hw_init()
345 writel(val, dev->io_base + SMI_CR1); in spear_smi_hw_init()
[all …]
/linux/drivers/leds/
H A Dleds-nic78bx.c34 u16 io_base; member
59 value = inb(nled->data->io_base); in nic78bx_brightness_set()
68 outb(value, nled->data->io_base); in nic78bx_brightness_set()
79 value = inb(nled->data->io_base); in nic78bx_brightness_get()
134 led_data->io_base + NIC78BX_LOCK_REG_OFFSET); in lock_led_reg_action()
168 led_data->io_base = io_rc->start; in nic78bx_probe()
185 led_data->io_base + NIC78BX_LOCK_REG_OFFSET); in nic78bx_probe()
/linux/drivers/platform/x86/
H A Dfujitsu-tablet.c165 int io_base; member
171 return inb(fujitsu.io_base + 2); in fujitsu_ack()
176 return inb(fujitsu.io_base + 6); in fujitsu_status()
181 outb(addr, fujitsu.io_base); in fujitsu_read_register()
182 return inb(fujitsu.io_base + 4); in fujitsu_read_register()
430 fujitsu.io_base = res->data.io.minimum; in fujitsu_walk_resources()
435 if (fujitsu.irq && fujitsu.io_base) in fujitsu_walk_resources()
457 if (ACPI_FAILURE(status) || !fujitsu.irq || !fujitsu.io_base) in acpi_fujitsu_probe()
467 if (!request_region(fujitsu.io_base, fujitsu.io_length, MODULENAME)) { in acpi_fujitsu_probe()
477 release_region(fujitsu.io_base, fujitsu.io_length); in acpi_fujitsu_probe()
[all …]
/linux/drivers/hwspinlock/
H A Dsun6i_hwspinlock.c95 void __iomem *io_base; in sun6i_hwspinlock_probe() local
99 io_base = devm_platform_ioremap_resource(pdev, SPINLOCK_BASE_ID); in sun6i_hwspinlock_probe()
100 if (IS_ERR(io_base)) in sun6i_hwspinlock_probe()
101 return PTR_ERR(io_base); in sun6i_hwspinlock_probe()
146 num_banks = readl(io_base + SPINLOCK_SYSSTATUS_REG) >> 28; in sun6i_hwspinlock_probe()
166 hwlock->priv = io_base + SPINLOCK_LOCK_REGN + sizeof(u32) * i; in sun6i_hwspinlock_probe()
H A Dstm32_hwspinlock.c75 void __iomem *io_base; in stm32_hwspinlock_probe() local
78 io_base = devm_platform_ioremap_resource(pdev, 0); in stm32_hwspinlock_probe()
79 if (IS_ERR(io_base)) in stm32_hwspinlock_probe()
80 return PTR_ERR(io_base); in stm32_hwspinlock_probe()
110 hw->bank.lock[i].priv = io_base + i * sizeof(u32); in stm32_hwspinlock_probe()
/linux/drivers/gpio/
H A Dgpio-it87.c65 u16 io_base; member
187 reg = (gpio_num / 8) + it87_gpio->io_base; in it87_gpio_get()
224 reg = (gpio_num / 8) + it87_gpio->io_base; in it87_gpio_set()
341 it87_gpio->io_base = superio_inw(gpio_ba_reg); in it87_gpio_init()
347 it87_gpio->io_base); in it87_gpio_init()
349 if (!request_region(it87_gpio->io_base, it87_gpio->io_size, in it87_gpio_init()
391 release_region(it87_gpio->io_base, it87_gpio->io_size); in it87_gpio_init()
400 release_region(it87_gpio->io_base, it87_gpio->io_size); in it87_gpio_exit()
/linux/arch/arm/mach-orion5x/
H A Dts78xx-setup.c155 void __iomem *io_base = chip->legacy.IO_ADDR_W; in ts78xx_ts_nand_write_buf() local
161 writesb(io_base, buf, sz); in ts78xx_ts_nand_write_buf()
169 writesl(io_base, buf32, sz); in ts78xx_ts_nand_write_buf()
175 writesb(io_base, buf, len); in ts78xx_ts_nand_write_buf()
181 void __iomem *io_base = chip->legacy.IO_ADDR_R; in ts78xx_ts_nand_read_buf() local
187 readsb(io_base, buf, sz); in ts78xx_ts_nand_read_buf()
195 readsl(io_base, buf32, sz); in ts78xx_ts_nand_read_buf()
201 readsb(io_base, buf, len); in ts78xx_ts_nand_read_buf()
/linux/drivers/pwm/
H A Dpwm-intel-lgm.c171 void __iomem *io_base; in lgm_pwm_probe() local
180 io_base = devm_platform_ioremap_resource(pdev, 0); in lgm_pwm_probe()
181 if (IS_ERR(io_base)) in lgm_pwm_probe()
182 return PTR_ERR(io_base); in lgm_pwm_probe()
184 pc->regmap = devm_regmap_init_mmio(dev, io_base, &lgm_pwm_regmap_config); in lgm_pwm_probe()

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