Searched refs:intsel (Results 1 – 3 of 3) sorted by relevance
1251 u32 intsel, value; in chv_gpio_irq_startup() local1253 intsel = chv_readl(pctrl, hwirq, CHV_PADCTRL0); in chv_gpio_irq_startup()1254 intsel &= CHV_PADCTRL0_INTSEL_MASK; in chv_gpio_irq_startup()1255 intsel >>= CHV_PADCTRL0_INTSEL_SHIFT; in chv_gpio_irq_startup()1263 if (cctx->intr_lines[intsel] == CHV_INVALID_HWIRQ) { in chv_gpio_irq_startup()1266 intsel, hwirq); in chv_gpio_irq_startup()1267 cctx->intr_lines[intsel] = hwirq; in chv_gpio_irq_startup()1280 u32 value, intsel; in chv_gpio_set_intr_line() local1284 intsel = (value & CHV_PADCTRL0_INTSEL_MASK) >> CHV_PADCTRL0_INTSEL_SHIFT; in chv_gpio_set_intr_line()1286 if (cctx->intr_lines[intsel] == pin) in chv_gpio_set_intr_line()[all …]
574 u8 tssel = 0, intsel = 0; in mn88443x_set_frontend() local581 intsel = TSSET3_INTASEL_S; in mn88443x_set_frontend()589 intsel = TSSET3_INTASEL_T; in mn88443x_set_frontend()598 intsel | TSSET3_INTBSEL_NONE); in mn88443x_set_frontend()
1068 const bool intsel = (core->pinmux.a1 == SI476X_A1_IRQ); in si476x_core_cmd_power_up_a10() local1074 ctsen << 7 | intsel << 6 | 0x07, /* Last five bits in si476x_core_cmd_power_up_a10()1091 const bool intsel = (core->pinmux.a1 == SI476X_A1_IRQ); in si476x_core_cmd_power_up_a20() local1097 ctsen << 7 | intsel << 6 | puargs->fastboot << 5 | in si476x_core_cmd_power_up_a20()