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Searched refs:intf_cfg (Results 1 – 4 of 4) sorted by relevance

/linux/drivers/gpu/drm/msm/disp/dpu1/
H A Ddpu_encoder_phys_wb.c231 struct dpu_hw_intf_cfg intf_cfg = {0}; in dpu_encoder_phys_wb_setup_ctl() local
237 intf_cfg.intf = DPU_NONE; in dpu_encoder_phys_wb_setup_ctl()
238 intf_cfg.wb = hw_wb->idx; in dpu_encoder_phys_wb_setup_ctl()
241 intf_cfg.merge_3d = hw_pp->merge_3d->idx; in dpu_encoder_phys_wb_setup_ctl()
244 intf_cfg.cdm = hw_cdm->idx; in dpu_encoder_phys_wb_setup_ctl()
255 phys_enc->hw_ctl->ops.setup_intf_cfg(phys_enc->hw_ctl, &intf_cfg); in dpu_encoder_phys_wb_setup_ctl()
257 struct dpu_hw_intf_cfg intf_cfg = {0}; in dpu_encoder_phys_wb_setup_ctl() local
259 intf_cfg.intf = DPU_NONE; in dpu_encoder_phys_wb_setup_ctl()
260 intf_cfg.wb = hw_wb->idx; in dpu_encoder_phys_wb_setup_ctl()
261 intf_cfg.mode_3d = in dpu_encoder_phys_wb_setup_ctl()
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H A Ddpu_encoder_phys_vid.c259 struct dpu_hw_intf_cfg intf_cfg = { 0 }; in dpu_encoder_phys_vid_setup_timing_engine() local
299 intf_cfg.cdm = phys_enc->hw_cdm->idx; in dpu_encoder_phys_vid_setup_timing_engine()
300 intf_cfg.intf = phys_enc->hw_intf->idx; in dpu_encoder_phys_vid_setup_timing_engine()
301 intf_cfg.intf_mode_sel = DPU_CTL_MODE_SEL_VID; in dpu_encoder_phys_vid_setup_timing_engine()
302 intf_cfg.stream_sel = 0; /* Don't care value for video mode */ in dpu_encoder_phys_vid_setup_timing_engine()
303 intf_cfg.mode_3d = dpu_encoder_helper_get_3d_blend_mode(phys_enc); in dpu_encoder_phys_vid_setup_timing_engine()
304 intf_cfg.dsc = dpu_encoder_helper_get_dsc(phys_enc); in dpu_encoder_phys_vid_setup_timing_engine()
305 if (intf_cfg.mode_3d && phys_enc->hw_pp->merge_3d) in dpu_encoder_phys_vid_setup_timing_engine()
306 intf_cfg.merge_3d = phys_enc->hw_pp->merge_3d->idx; in dpu_encoder_phys_vid_setup_timing_engine()
312 phys_enc->hw_ctl->ops.setup_intf_cfg(phys_enc->hw_ctl, &intf_cfg); in dpu_encoder_phys_vid_setup_timing_engine()
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H A Ddpu_encoder.c2247 struct dpu_hw_intf_cfg intf_cfg = { 0 }; in dpu_encoder_helper_phys_cleanup() local
2307 intf_cfg.stream_sel = 0; /* Don't care value for video mode */ in dpu_encoder_helper_phys_cleanup()
2308 intf_cfg.mode_3d = dpu_encoder_helper_get_3d_blend_mode(phys_enc); in dpu_encoder_helper_phys_cleanup()
2309 intf_cfg.dsc = dpu_encoder_helper_get_dsc(phys_enc); in dpu_encoder_helper_phys_cleanup()
2312 intf_cfg.intf = phys_enc->hw_intf->idx; in dpu_encoder_helper_phys_cleanup()
2314 intf_cfg.wb = phys_enc->hw_wb->idx; in dpu_encoder_helper_phys_cleanup()
2317 intf_cfg.merge_3d = phys_enc->hw_pp->merge_3d->idx; in dpu_encoder_helper_phys_cleanup()
2320 ctl->ops.reset_intf_cfg(ctl, &intf_cfg); in dpu_encoder_helper_phys_cleanup()
/linux/sound/soc/qcom/qdsp6/
H A Daudioreach.c611 struct apm_display_port_module_intf_cfg *intf_cfg; in audioreach_display_port_set_media_format() local
655 intf_cfg = p; in audioreach_display_port_set_media_format()
656 param_data = &intf_cfg->param_data; in audioreach_display_port_set_media_format()
662 intf_cfg->cfg.channel_allocation = cfg->channel_allocation; in audioreach_display_port_set_media_format()
663 intf_cfg->cfg.mst_idx = 0; in audioreach_display_port_set_media_format()
664 intf_cfg->cfg.dptx_idx = cfg->dp_idx; in audioreach_display_port_set_media_format()
678 struct apm_codec_dma_module_intf_cfg *intf_cfg; in audioreach_codec_dma_set_media_format() local
724 intf_cfg = p; in audioreach_codec_dma_set_media_format()
725 param_data = &intf_cfg->param_data; in audioreach_codec_dma_set_media_format()
731 intf_cfg->cfg.lpaif_type = module->hw_interface_type; in audioreach_codec_dma_set_media_format()
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