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Searched refs:int_sel (Results 1 – 8 of 8) sorted by relevance

/linux/drivers/gpu/drm/amd/amdkfd/
H A Dkfd_pm4_headers_vi.h475 enum RELEASE_MEM_int_sel_enum int_sel:3; member
/linux/drivers/gpu/drm/amd/amdgpu/
H A Dgfx_v8_0.c6050 bool int_sel = flags & AMDGPU_FENCE_FLAG_INT; in gfx_v8_0_ring_emit_fence_gfx() local
6079 DATA_SEL(write64bit ? 2 : 1) | INT_SEL(int_sel ? 2 : 0)); in gfx_v8_0_ring_emit_fence_gfx()
6147 bool int_sel = flags & AMDGPU_FENCE_FLAG_INT; in gfx_v8_0_ring_emit_fence_compute() local
6156 amdgpu_ring_write(ring, DATA_SEL(write64bit ? 2 : 1) | INT_SEL(int_sel ? 2 : 0)); in gfx_v8_0_ring_emit_fence_compute()
H A Dgfx_v9_4_3.c2989 bool int_sel = flags & AMDGPU_FENCE_FLAG_INT; in gfx_v9_4_3_ring_emit_fence() local
3002 amdgpu_ring_write(ring, DATA_SEL(write64bit ? 2 : 1) | INT_SEL(int_sel ? 2 : 0)); in gfx_v9_4_3_ring_emit_fence()
H A Dgfx_v12_1.c3742 bool int_sel = flags & AMDGPU_FENCE_FLAG_INT; in gfx_v12_1_ring_emit_fence() local
3754 PACKET3_RELEASE_MEM__INT_SEL(int_sel ? 2 : 0))); in gfx_v12_1_ring_emit_fence()
H A Dgfx_v12_0.c4571 bool int_sel = flags & AMDGPU_FENCE_FLAG_INT; in gfx_v12_0_ring_emit_fence()
4581 PACKET3_RELEASE_MEM_INT_SEL(int_sel ? 2 : 0))); in gfx_v12_0_ring_emit_fence()
4569 bool int_sel = flags & AMDGPU_FENCE_FLAG_INT; gfx_v12_0_ring_emit_fence() local
H A Dgfx_v9_0.c5590 bool int_sel = flags & AMDGPU_FENCE_FLAG_INT; in gfx_v9_0_ring_emit_fence() local
5610 amdgpu_ring_write(ring, DATA_SEL(write64bit ? 2 : 1) | INT_SEL(int_sel ? 2 : 0)); in gfx_v9_0_ring_emit_fence()
H A Dgfx_v11_0.c6082 bool int_sel = flags & AMDGPU_FENCE_FLAG_INT; in gfx_v11_0_ring_emit_fence()
6094 PACKET3_RELEASE_MEM_INT_SEL(int_sel ? 2 : 0))); in gfx_v11_0_ring_emit_fence()
6080 bool int_sel = flags & AMDGPU_FENCE_FLAG_INT; gfx_v11_0_ring_emit_fence() local
H A Dgfx_v10_0.c8725 bool int_sel = flags & AMDGPU_FENCE_FLAG_INT; in gfx_v10_0_ring_emit_fence() local
8737 PACKET3_RELEASE_MEM_INT_SEL(int_sel ? 2 : 0))); in gfx_v10_0_ring_emit_fence()