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Searched refs:int_sel (Results 1 – 6 of 6) sorted by relevance

/linux/drivers/gpu/drm/amd/amdkfd/
H A Dkfd_pm4_headers_vi.h475 enum RELEASE_MEM_int_sel_enum int_sel:3; member
/linux/drivers/gpu/drm/amd/amdgpu/
H A Dgfx_v6_0.c1895 bool int_sel = flags & AMDGPU_FENCE_FLAG_INT; in gfx_v6_0_ring_emit_fence() local
1914 ((int_sel ? 2 : 0) << CP_EOP_DONE_DATA_CNTL__INT_SEL__SHIFT)); in gfx_v6_0_ring_emit_fence()
H A Dgfx_v12_1.c3390 bool int_sel = flags & AMDGPU_FENCE_FLAG_INT; in gfx_v12_1_ring_emit_fence() local
3402 PACKET3_RELEASE_MEM_INT_SEL(int_sel ? 2 : 0))); in gfx_v12_1_ring_emit_fence()
H A Dgfx_v12_0.c4488 bool int_sel = flags & AMDGPU_FENCE_FLAG_INT; in gfx_v12_0_ring_emit_fence() local
4498 PACKET3_RELEASE_MEM_INT_SEL(int_sel ? 2 : 0))); in gfx_v12_0_ring_emit_fence()
H A Dgfx_v11_0.c6005 bool int_sel = flags & AMDGPU_FENCE_FLAG_INT; in gfx_v11_0_ring_emit_fence() local
6017 PACKET3_RELEASE_MEM_INT_SEL(int_sel ? 2 : 0))); in gfx_v11_0_ring_emit_fence()
H A Dgfx_v9_0.c5540 bool int_sel = flags & AMDGPU_FENCE_FLAG_INT; in gfx_v9_0_ring_emit_fence() local
5560 amdgpu_ring_write(ring, DATA_SEL(write64bit ? 2 : 1) | INT_SEL(int_sel ? 2 : 0)); in gfx_v9_0_ring_emit_fence()