Searched refs:int_sel (Results 1 – 6 of 6) sorted by relevance
475 enum RELEASE_MEM_int_sel_enum int_sel:3; member
1895 bool int_sel = flags & AMDGPU_FENCE_FLAG_INT; in gfx_v6_0_ring_emit_fence() local1914 ((int_sel ? 2 : 0) << CP_EOP_DONE_DATA_CNTL__INT_SEL__SHIFT)); in gfx_v6_0_ring_emit_fence()
3450 bool int_sel = flags & AMDGPU_FENCE_FLAG_INT; in gfx_v12_1_ring_emit_vm_flush() 3462 PACKET3_RELEASE_MEM__INT_SEL(int_sel ? 2 : 0))); in gfx_v12_1_ring_emit_fence_kiq() 3390 bool int_sel = flags & AMDGPU_FENCE_FLAG_INT; gfx_v12_1_ring_emit_fence() local
4529 bool int_sel = flags & AMDGPU_FENCE_FLAG_INT; in gfx_v12_0_ring_emit_pipeline_sync() 4539 PACKET3_RELEASE_MEM_INT_SEL(int_sel ? 2 : 0))); in gfx_v12_0_ring_invalidate_tlbs() 4495 bool int_sel = flags & AMDGPU_FENCE_FLAG_INT; gfx_v12_0_ring_emit_fence() local
6049 bool int_sel = flags & AMDGPU_FENCE_FLAG_INT; in gfx_v11_0_ring_invalidate_tlbs() 6061 PACKET3_RELEASE_MEM_INT_SEL(int_sel ? 2 : 0))); in gfx_v11_0_ring_emit_vm_flush() 6005 bool int_sel = flags & AMDGPU_FENCE_FLAG_INT; gfx_v11_0_ring_emit_fence() local
5548 bool int_sel = flags & AMDGPU_FENCE_FLAG_INT; in gfx_v9_0_ring_emit_fence() 5568 amdgpu_ring_write(ring, DATA_SEL(write64bit ? 2 : 1) | INT_SEL(int_sel ? 2 : 0)); in gfx_v9_0_ring_emit_fence() 5540 bool int_sel = flags & AMDGPU_FENCE_FLAG_INT; gfx_v9_0_ring_emit_fence() local