Searched refs:input_mask (Results 1 – 7 of 7) sorted by relevance
242 if (!cp->input_mask) continue; in pvr2_context_reset_input_limits()243 tmsk &= cp->input_mask; in pvr2_context_reset_input_limits()306 cp->input_mask = 0; in pvr2_channel_done()333 if (cmsk == cp->input_mask) { in pvr2_channel_limit_inputs()341 cp->input_mask = 0; in pvr2_channel_limit_inputs()348 if (!p2->input_mask) continue; in pvr2_channel_limit_inputs()349 tmsk &= p2->input_mask; in pvr2_channel_limit_inputs()361 cp->input_mask = cmsk; in pvr2_channel_limit_inputs()371 return cp->input_mask; in pvr2_channel_get_limited_inputs()
930 unsigned int input_mask = 0; in pvr2_v4l2_open() local962 input_mask = (1 << PVR2_CVAL_INPUT_RADIO); in pvr2_v4l2_open()966 input_mask = ((1 << PVR2_CVAL_INPUT_RADIO) | in pvr2_v4l2_open()971 ret = pvr2_channel_limit_inputs(&fhp->channel,input_mask); in pvr2_v4l2_open()982 input_mask &= pvr2_hdw_get_input_available(hdw); in pvr2_v4l2_open()984 for (idx = 0; idx < (sizeof(input_mask) << 3); idx++) { in pvr2_v4l2_open()985 if (input_mask & (1UL << idx)) input_cnt++; in pvr2_v4l2_open()999 for (idx = 0; idx < (sizeof(input_mask) << 3); idx++) { in pvr2_v4l2_open()1000 if (!(input_mask & (1UL << idx))) continue; in pvr2_v4l2_open()
51 unsigned int input_mask; member
42 u16 input_mask; /* 1 = GPIO is input direction, 0 = output */ member79 lp3943_gpio->input_mask |= BIT(offset); in lp3943_gpio_direction_input()144 if (lp3943_gpio->input_mask & BIT(offset)) in lp3943_gpio_get()174 lp3943_gpio->input_mask &= ~BIT(offset); in lp3943_gpio_direction_output()
8 union txgbe_atr_input *input_mask);10 int txgbe_fdir_set_input_mask(struct wx *wx, union txgbe_atr_input *input_mask);
1000 union ixgbe_atr_input *input_mask);
1034 struct input_mask mask; in evdev_do_ioctl()