Searched refs:input_clock (Results 1 – 14 of 14) sorted by relevance
247 if (chip->input_clock != ECHO_CLOCK_INTERNAL) { in set_sample_rate()253 set_input_clock(chip, chip->input_clock); in set_sample_rate()324 chip->input_clock = ECHO_CLOCK_INTERNAL; in set_input_clock()354 chip->input_clock = clock; in set_input_clock()370 if (chip->input_clock == ECHO_CLOCK_ADAT) in dsp_set_digital_mode()374 if (chip->input_clock == ECHO_CLOCK_SPDIF) in dsp_set_digital_mode()
158 if (chip->input_clock != ECHO_CLOCK_INTERNAL) { in set_sample_rate()233 chip->input_clock = ECHO_CLOCK_INTERNAL; in set_input_clock()263 chip->input_clock = clock; in set_input_clock()280 if (chip->input_clock == ECHO_CLOCK_ADAT) in dsp_set_digital_mode()284 if (chip->input_clock == ECHO_CLOCK_SPDIF) in dsp_set_digital_mode()
155 if (chip->input_clock != ECHO_CLOCK_INTERNAL) { in set_sample_rate()250 chip->input_clock = ECHO_CLOCK_INTERNAL; in set_input_clock()278 chip->input_clock = clock; in set_input_clock()330 if (chip->input_clock == ECHO_CLOCK_ADAT) in dsp_set_digital_mode()335 if (chip->input_clock == ECHO_CLOCK_SPDIF) in dsp_set_digital_mode()
190 if (chip->input_clock != ECHO_CLOCK_INTERNAL) { in set_sample_rate()297 chip->input_clock = ECHO_CLOCK_INTERNAL; in set_input_clock()340 chip->input_clock = clock; in set_input_clock()356 if (chip->input_clock == ECHO_CLOCK_ADAT) in dsp_set_digital_mode()360 if (chip->input_clock == ECHO_CLOCK_SPDIF) in dsp_set_digital_mode()
153 if (chip->input_clock != ECHO_CLOCK_INTERNAL) { in set_sample_rate()199 chip->input_clock = clock_source; in set_input_clock()201 chip->comm_page->input_clock = cpu_to_le16(clock); in set_input_clock()
131 if (chip->input_clock == ECHO_CLOCK_ESYNC) in set_sample_rate()147 chip->input_clock = clock; in set_input_clock()
145 chip->input_clock = clock; in set_input_clock()153 chip->input_clock = clock; in set_input_clock()
121 if (chip->input_clock == ECHO_CLOCK_SPDIF) in set_sample_rate()148 chip->input_clock = clock; in set_input_clock()
88 return set_input_clock(chip, chip->input_clock); in set_input_auto_mute()
665 __le16 input_clock; /* Chg. Input clock state 0xb68 2 */ member
362 u8 input_clock; /* Currently selected sample clock member
739 if (set_input_clock(chip, chip->input_clock) < 0) in restore_dsp_settings()999 chip->input_clock = ECHO_CLOCK_INTERNAL; in init_line_levels()
1532 clock = chip->input_clock; in snd_echo_clock_source_get()1554 if (chip->input_clock != dclock) { in snd_echo_clock_source_put()
175 u32 input_clock = clk_get_rate(dev->clk); in i2c_davinci_calc_clk_dividers() local204 psc = (input_clock / 12000000) - 1; in i2c_davinci_calc_clk_dividers()205 if ((input_clock / (psc + 1)) > 12000000) in i2c_davinci_calc_clk_dividers()212 clk = ((input_clock / (psc + 1)) / (dev->bus_freq * 1000)); in i2c_davinci_calc_clk_dividers()214 if (input_clock / (psc + 1) / clk > dev->bus_freq * 1000) in i2c_davinci_calc_clk_dividers()245 dev_dbg(dev->dev, "input_clock = %d, CLK = %d\n", input_clock, clk); in i2c_davinci_calc_clk_dividers()