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Searched refs:imm12 (Results 1 – 4 of 4) sorted by relevance

/linux/arch/arm64/net/
H A Dbpf_jit.h175 #define A64_ADDSUB_IMM(sf, Rd, Rn, imm12, type) \ argument
176 aarch64_insn_gen_add_sub_imm(Rd, Rn, imm12, \
179 #define A64_ADD_I(sf, Rd, Rn, imm12) A64_ADDSUB_IMM(sf, Rd, Rn, imm12, ADD) argument
180 #define A64_SUB_I(sf, Rd, Rn, imm12) A64_ADDSUB_IMM(sf, Rd, Rn, imm12, SUB) argument
181 #define A64_ADDS_I(sf, Rd, Rn, imm12) \ argument
182 A64_ADDSUB_IMM(sf, Rd, Rn, imm12, ADD_SETFLAGS)
183 #define A64_SUBS_I(sf, Rd, Rn, imm12) \ argument
184 A64_ADDSUB_IMM(sf, Rd, Rn, imm12, SUB_SETFLAGS)
186 #define A64_CMN_I(sf, Rn, imm12) A64_ADDS_I(sf, A64_ZR, Rn, imm12) argument
188 #define A64_CMP_I(sf, Rn, imm12) A64_SUBS_I(sf, A64_ZR, Rn, imm12) argument
/linux/arch/arm/kernel/
H A Dphys2virt.S158 @ rotation value. (The effective value of the immediate is imm12<7:0>
159 @ rotated right by [2 * imm12<11:8>] bits)
163 @ ADD | cond | 0 0 1 0 1 0 0 0 | Rn | Rd | imm12 |
164 @ SUB | cond | 0 0 1 0 0 1 0 0 | Rn | Rd | imm12 |
165 @ MOV | cond | 0 0 1 1 1 0 1 0 | Rn | Rd | imm12 |
166 @ MVN | cond | 0 0 1 1 1 1 1 0 | Rn | Rd | imm12 |
179 @ MOVW | cond | 0 0 1 1 0 0 0 0 | imm4 | Rd | imm12 |
194 bfc ip, #0, #12 @ clear imm12 field of MOV[W] instruction
/linux/arch/arm/net/
H A Dbpf_jit_32.c351 static u32 arm_bpf_ldst_imm12(u32 op, u8 rt, u8 rn, s16 imm12) in arm_bpf_ldst_imm12() argument
354 if (imm12 >= 0) in arm_bpf_ldst_imm12()
357 imm12 = -imm12; in arm_bpf_ldst_imm12()
358 return op | (imm12 & ARM_INST_LDST__IMM12); in arm_bpf_ldst_imm12()
482 int imm12 = imm8m(val); in emit_mov_i() local
484 if (imm12 >= 0) in emit_mov_i()
485 emit(ARM_MOV_I(rd, imm12), ctx); in emit_mov_i()
/linux/arch/riscv/kernel/
H A Dmodule.c101 u32 imm12 = (offset & 0x1000) << (31 - 12); in apply_r_riscv_branch_rela() local
106 return riscv_insn_rmw(location, 0x1fff07f, imm12 | imm11 | imm10_5 | imm4_1); in apply_r_riscv_branch_rela()