| /linux/arch/arm/net/ |
| H A D | bpf_jit_32.h | 167 #define _AL3_I(op, rd, rn, imm) ((op ## _I) | (rd) << 12 | (rn) << 16 | (imm)) argument
173 #define ARM_ADD_I(rd, rn, imm) _AL3_I(ARM_INST_ADD, rd, rn, imm) argument
174 #define ARM_ADDS_I(rd, rn, imm) _AL3_I(ARM_INST_ADDS, rd, rn, imm) argument
176 #define ARM_ADC_I(rd, rn, imm) _AL3_I(ARM_INST_ADC, rd, rn, imm) argument
180 #define ARM_AND_I(rd, rn, imm) _AL3_I(ARM_INST_AND, rd, rn, imm) argument
183 #define ARM_BIC_I(rd, rn, imm) _AL3_I(ARM_INST_BIC, rd, rn, imm) argument
190 #define ARM_CMP_I(rn, imm) _AL3_I(ARM_INST_CMP, 0, rn, imm) argument
193 #define ARM_EOR_I(rd, rn, imm) _AL3_I(ARM_INST_EOR, rd, rn, imm) argument
198 #define ARM_LDR_R_SI(rt, rn, rm, type, imm) \ argument
201 | (imm) << 7 | (type) << 5 | (rm))
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| /linux/arch/loongarch/kernel/ |
| H A D | inst.c | 19 unsigned int imm = insn.reg1i20_format.immediate; in simu_pc() local
28 regs->regs[rd] = pc + sign_extend64(imm << 2, 21); in simu_pc()
31 regs->regs[rd] = pc + sign_extend64(imm << 12, 31); in simu_pc()
34 regs->regs[rd] = pc + sign_extend64(imm << 18, 37); in simu_pc()
37 regs->regs[rd] = pc + sign_extend64(imm << 12, 31); in simu_pc()
50 unsigned int imm, imm_l, imm_h, rd, rj; in simu_branch() local
88 imm = insn.reg2i16_format.immediate; in simu_branch()
94 regs->csr_era = pc + sign_extend64(imm << 2, 17); in simu_branch()
100 regs->csr_era = pc + sign_extend64(imm << 2, 17); in simu_branch()
106 regs->csr_era = pc + sign_extend64(imm << 2, 17); in simu_branch()
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| /linux/tools/include/linux/ |
| H A D | filter.h | 40 .imm = 0 })
48 .imm = 0 })
58 .imm = IMM })
66 .imm = IMM })
76 .imm = LEN })
86 .imm = 0 })
94 .imm = 0 })
104 .imm = IMM })
112 .imm = IMM })
122 .imm = 0 })
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| /linux/samples/bpf/ |
| H A D | bpf_insn.h | 16 .imm = 0 })
24 .imm = 0 })
34 .imm = IMM })
42 .imm = IMM })
52 .imm = 0 })
60 .imm = 0 })
70 .imm = IMM })
78 .imm = IMM })
90 .imm = (__u32) (IMM) }), \
96 .imm = ((__u64) (IMM)) >> 32 })
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| /linux/tools/testing/selftests/bpf/ |
| H A D | disasm.c | 23 insn->imm >= 0 && insn->imm < __BPF_FUNC_MAX_ID && in __func_get_name()
24 func_id_str[insn->imm]) in __func_get_name()
25 return func_id_str[insn->imm]; in __func_get_name()
36 snprintf(buff, len, "%+d", insn->imm); in __func_get_name()
145 insn->imm, insn->dst_reg); in print_bpf_end_insn()
154 insn->imm, insn->dst_reg); in print_bpf_bswap_insn()
207 insn->src_reg, ((u32)insn->imm) >> 16, (u16)insn->imm); in print_bpf_insn()
226 insn->imm); in print_bpf_insn()
312 u64 imm = ((u64)(insn + 1)->imm << 32) | (u32)insn->imm; print_bpf_insn() local
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| /linux/arch/mips/net/ |
| H A D | bpf_jit_comp32.c | 174 static void emit_mov_se_i64(struct jit_context *ctx, const u8 dst[], s32 imm) in emit_mov_se_i64() argument
176 emit_mov_i(ctx, lo(dst), imm); in emit_mov_se_i64()
177 if (imm < 0) in emit_mov_se_i64()
202 const u8 dst[], s32 imm, u8 op) in emit_alu_i64() argument
210 if (imm > S32_MIN && imm < 0) in emit_alu_i64()
214 imm = -imm; in emit_alu_i64()
218 imm = -imm; in emit_alu_i64()
223 emit_mov_i(ctx, src, imm); in emit_alu_i64()
231 if (imm < 0) in emit_alu_i64()
239 if (imm < 0) in emit_alu_i64()
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| H A D | bpf_jit_comp64.c | 158 static void emit_alu_i64(struct jit_context *ctx, u8 dst, s32 imm, u8 op) in emit_alu_i64() argument
163 emit(ctx, ori, dst, dst, (u16)imm); in emit_alu_i64()
167 emit(ctx, xori, dst, dst, (u16)imm); in emit_alu_i64()
175 emit(ctx, dsll_safe, dst, dst, imm); in emit_alu_i64()
179 emit(ctx, dsrl_safe, dst, dst, imm); in emit_alu_i64()
183 emit(ctx, dsra_safe, dst, dst, imm); in emit_alu_i64()
187 emit(ctx, daddiu, dst, dst, imm); in emit_alu_i64()
191 emit(ctx, daddiu, dst, dst, -imm); in emit_alu_i64()
195 emit_alu_i(ctx, dst, imm, op); in emit_alu_i64()
642 s32 imm = insn->imm; in build_insn() local
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| H A D | bpf_jit_comp.h | 160 void emit_mov_i(struct jit_context *ctx, u8 dst, s32 imm);
166 bool valid_alu_i(u8 op, s32 imm);
169 bool rewrite_alu_i(u8 op, s32 imm, u8 *alu, s32 *val);
172 void emit_alu_i(struct jit_context *ctx, u8 dst, s32 imm, u8 op);
187 bool valid_jmp_i(u8 op, s32 imm);
190 void setup_jmp_i(struct jit_context *ctx, s32 imm, u8 width,
201 void emit_jmp_i(struct jit_context *ctx, u8 dst, s32 imm, s32 off, u8 op);
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| /linux/arch/powerpc/net/ |
| H A D | bpf_jit_comp64.c | 764 s32 imm = insn->imm; in bpf_jit_emit_atomic_ops() local
779 if ((imm & BPF_FETCH) && IS_ENABLED(CONFIG_SMP)) in bpf_jit_emit_atomic_ops()
790 if (imm & BPF_FETCH) in bpf_jit_emit_atomic_ops()
793 switch (imm) { in bpf_jit_emit_atomic_ops()
841 if (imm & BPF_FETCH) { in bpf_jit_emit_atomic_ops()
850 if (size != BPF_DW && imm == BPF_CMPXCHG && in bpf_jit_emit_atomic_ops()
899 s32 imm = insn.imm; in emit_atomic_ld_st() local
901 switch (imm) { in emit_atomic_ld_st()
948 imm); in emit_atomic_ld_st()
976 s32 imm = insn[i].imm; in bpf_jit_build_body() local
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| /linux/arch/riscv/net/ |
| H A D | bpf_jit_comp32.c | 111 static void emit_imm(const s8 rd, s32 imm, struct rv_jit_context *ctx) in emit_imm() argument
113 u32 upper = (imm + (1 << 11)) >> 12; in emit_imm()
114 u32 lower = imm & 0xfff; in emit_imm()
124 static void emit_imm32(const s8 *rd, s32 imm, struct rv_jit_context *ctx) in emit_imm32() argument
127 emit_imm(lo(rd), imm, ctx); in emit_imm32()
130 if (imm >= 0) in emit_imm32()
243 static void emit_alu_i64(const s8 *dst, s32 imm, in emit_alu_i64() argument
251 emit_imm32(rd, imm, ctx); in emit_alu_i64()
254 if (is_12b_int(imm)) { in emit_alu_i64()
255 emit(rv_andi(lo(rd), lo(rd), imm), ctx); in emit_alu_i64()
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| H A D | bpf_jit_comp64.c | 531 static void emit_st(u8 rd, s16 off, s32 imm, u8 size, struct rv_jit_context *ctx) in emit_st() argument
533 emit_imm(RV_REG_T1, imm, ctx); in emit_st()
568 s32 imm = insn->imm; in emit_atomic_ld_st() local
571 switch (imm) { in emit_atomic_ld_st()
599 pr_err_once("bpf-jit: invalid atomic load/store opcode %02x\n", imm); in emit_atomic_ld_st()
611 s32 imm = insn->imm; in emit_atomic_rmw() local
634 switch (imm) { in emit_atomic_rmw()
707 pr_err_once("bpf-jit: invalid atomic RMW opcode %02x\n", imm); in emit_atomic_rmw()
1378 s32 imm = insn->imm; in bpf_jit_emit_insn() local
1411 if (imm == 1) { in bpf_jit_emit_insn()
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| /linux/arch/arm/probes/kprobes/ |
| H A D | checkers-common.c | 34 int imm = insn & 0xff; in checker_stack_use_imm_0xx() local
35 asi->stack_space = imm; in checker_stack_use_imm_0xx()
47 int imm = insn & 0xff; in checker_stack_use_t32strd() local
48 asi->stack_space = imm << 2; in checker_stack_use_t32strd()
56 int imm = ((insn & 0xf00) >> 4) + (insn & 0xf); in checker_stack_use_imm_x0x() local
57 asi->stack_space = imm; in checker_stack_use_imm_x0x()
66 int imm = insn & 0xfff; in checker_stack_use_imm_xxx() local
67 asi->stack_space = imm; in checker_stack_use_imm_xxx()
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| /linux/arch/riscv/kernel/ |
| H A D | alternative.c | 81 s32 imm; in riscv_alternative_fix_auipc_jalr() local
84 imm = riscv_insn_extract_utype_itype_imm(auipc_insn, jalr_insn); in riscv_alternative_fix_auipc_jalr()
85 imm -= patch_offset; in riscv_alternative_fix_auipc_jalr()
88 riscv_insn_insert_utype_itype_imm(&call[0], &call[1], imm); in riscv_alternative_fix_auipc_jalr()
96 s32 imm; in riscv_alternative_fix_jal() local
99 imm = riscv_insn_extract_jtype_imm(jal_insn); in riscv_alternative_fix_jal()
100 imm -= patch_offset; in riscv_alternative_fix_jal()
103 riscv_insn_insert_jtype_imm(&jal_insn, imm); in riscv_alternative_fix_jal()
139 s32 imm = riscv_insn_extract_jtype_imm(insn); in riscv_alternative_fix_offsets() local
142 if ((alt_ptr + i * sizeof(u32) + imm) >= alt_ptr && in riscv_alternative_fix_offsets()
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| /linux/arch/loongarch/net/ |
| H A D | bpf_jit.h | 140 static inline void move_imm(struct jit_ctx *ctx, enum loongarch_gpr rd, long imm, bool is32) in move_imm() argument
145 if (imm == 0) { in move_imm()
151 if (is_signed_imm12(imm)) { in move_imm()
152 emit_insn(ctx, addiw, rd, LOONGARCH_GPR_ZERO, imm); in move_imm()
157 if (is_unsigned_imm12(imm)) { in move_imm()
158 emit_insn(ctx, ori, rd, LOONGARCH_GPR_ZERO, imm); in move_imm()
163 imm_63_52 = (imm >> 52) & 0xfff; in move_imm()
164 imm_51_0 = imm & 0xfffffffffffff; in move_imm()
171 imm_31_12 = (imm >> 12) & 0xfffff; in move_imm()
175 imm_11_0 = imm & 0xfff; in move_imm()
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| H A D | bpf_jit.c | 362 const s32 imm = insn->imm; in emit_atomic_rmw() local
369 switch (imm) { in emit_atomic_rmw()
514 pr_err_once("bpf-jit: invalid atomic read-modify-write opcode %02x\n", imm); in emit_atomic_rmw()
527 const s32 imm = insn->imm; in emit_atomic_ld_st() local
529 switch (imm) { in emit_atomic_ld_st()
607 pr_err_once("bpf-jit: invalid atomic load/store opcode %02x\n", imm); in emit_atomic_ld_st()
715 const s32 imm = insn->imm; in build_insn() local
753 move_imm(ctx, dst, imm, is32); in build_insn()
766 if (is_signed_imm12(imm)) { in build_insn()
767 emit_insn(ctx, addid, dst, dst, imm); in build_insn()
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| /linux/arch/parisc/net/ |
| H A D | bpf_jit_comp32.c | 141 static void emit_imm(const s8 rd, s32 imm, struct hppa_jit_context *ctx) in emit_imm() argument
143 u32 lower = im11(imm); in emit_imm()
146 if (OPTIMIZE_HPPA && relative_bits_ok(imm, 14)) { in emit_imm()
147 emit(hppa_ldi(imm, rd), ctx); in emit_imm()
150 emit(hppa_ldil(imm, rd), ctx); in emit_imm()
156 static void emit_imm32(const s8 *rd, s32 imm, struct hppa_jit_context *ctx) in emit_imm32() argument
160 emit_imm(lo(rd), imm, ctx); in emit_imm32()
164 if (imm >= 0) in emit_imm32()
421 static void emit_alu_i64(const s8 *dst, s32 imm, in emit_alu_i64() argument
435 emit_imm32(rd, imm, ctx); in emit_alu_i64()
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| H A D | bpf_jit_comp64.c | 135 static void emit_imm32(u8 rd, s32 imm, struct hppa_jit_context *ctx) in emit_imm32() argument
137 u32 lower = im11(imm); in emit_imm32()
140 if (OPTIMIZE_HPPA && relative_bits_ok(imm, 14)) { in emit_imm32()
141 emit(hppa_ldi(imm, rd), ctx); in emit_imm32()
144 if (OPTIMIZE_HPPA && lower == imm) { in emit_imm32()
148 emit(hppa_ldil(imm, rd), ctx); in emit_imm32()
160 static void emit_imm(u8 rd, s64 imm, u8 tmpreg, struct hppa_jit_context *ctx) in emit_imm() argument
165 emit_imm32(rd, imm, ctx); in emit_imm()
168 if (OPTIMIZE_HPPA && is_32b_int(imm)) in emit_imm()
172 upper32 = imm >> 32; in emit_imm()
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| /linux/arch/loongarch/include/asm/ |
| H A D | inst.h | 520 u32 larch_insn_gen_break(int imm);
525 u32 larch_insn_gen_lu12iw(enum loongarch_gpr rd, int imm);
526 u32 larch_insn_gen_lu32id(enum loongarch_gpr rd, int imm);
527 u32 larch_insn_gen_lu52id(enum loongarch_gpr rd, enum loongarch_gpr rj, int imm);
528 u32 larch_insn_gen_beq(enum loongarch_gpr rd, enum loongarch_gpr rj, int imm);
529 u32 larch_insn_gen_bne(enum loongarch_gpr rd, enum loongarch_gpr rj, int imm);
530 u32 larch_insn_gen_jirl(enum loongarch_gpr rd, enum loongarch_gpr rj, int imm);
544 int imm) \
547 insn->reg0i15_format.immediate = imm; \
554 #define __emit_break(imm) ((u32)((imm) | (break_op << 15))) in DEF_EMIT_REG0I15_FORMAT() argument
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| /linux/arch/arm64/net/ |
| H A D | bpf_jit_comp.c | 36 #define check_imm(bits, imm) do { \ argument
37 if ((((imm) > 0) && ((imm) >> ((bits) - 1))) || \
38 (((imm) < 0) && (~(imm) >> ((bits) - 1)))) { \
40 i, imm, imm); \
44 #define check_imm19(imm) check_imm(19, imm) argument
45 #define check_imm26(imm) check_imm(26, imm) argument
288 static bool is_addsub_imm(u32 imm) in is_addsub_imm() argument
291 return !(imm & ~0xfff) || !(imm & ~0xfff000); in is_addsub_imm()
295 const int tmp, const s32 imm, struct jit_ctx *ctx) in emit_a64_add_i() argument
297 if (is_addsub_imm(imm)) { in emit_a64_add_i()
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| /linux/kernel/bpf/ |
| H A D | fixups.c | 20 insn->imm == BPF_CMPXCHG; in is_cmpxchg_insn()
34 if (insn->imm == BPF_CMPXCHG) in insn_def_regno()
36 else if (insn->imm == BPF_LOAD_ACQ) in insn_def_regno()
38 else if (insn->imm & BPF_FETCH) in insn_def_regno()
63 if (d0->imm != d1->imm) in kfunc_desc_cmp_by_imm_off()
64 return d0->imm < d1->imm ? -1 : 1; in kfunc_desc_cmp_by_imm_off()
75 .imm = insn->imm, in bpf_jit_find_kfunc_model()
103 desc->imm = call_imm; in set_kfunc_desc_imm()
134 ret = bpf_add_kfunc_call(env, insn->imm, insn->off); in add_kfunc_in_insns()
146 int start = idx + insn->imm + 1, subprog; in get_callee_stack_depth()
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| /linux/arch/sh/kernel/ |
| H A D | disassemble.c | 300 int imm = 0; in print_sh_insn() local
317 imm = (nibs[2] << 4) | (nibs[3]); in print_sh_insn()
318 if (imm & 0x80) in print_sh_insn()
319 imm |= ~0xff; in print_sh_insn()
320 imm = ((char)imm) * 2 + 4 ; in print_sh_insn()
323 imm = ((nibs[1]) << 8) | (nibs[2] << 4) | (nibs[3]); in print_sh_insn()
324 if (imm & 0x800) in print_sh_insn()
325 imm |= ~0xfff; in print_sh_insn()
326 imm = imm * 2 + 4; in print_sh_insn()
329 imm = nibs[3]; in print_sh_insn()
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| /linux/Documentation/bpf/standardization/ |
| H A D | instruction-set.rst | 166 | imm |
209 **imm**
212 Note that the contents of multi-byte fields ('offset' and 'imm') are
218 opcode offset imm assembly
240 | imm |
258 **imm**
308 K 0 use 32-bit 'imm' value as source operand
376 dst = (u32) dst ^ (u32) imm
380 dst = dst ^ imm
392 'imm' is interpreted as a 32-bit unsigned value. For ``ALU64``,
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| /linux/include/linux/ |
| H A D | filter.h | 110 .imm = 0 })
121 .imm = 0 })
134 .imm = IMM })
144 .imm = IMM })
156 .imm = LEN })
166 .imm = LEN })
176 .imm = 0 })
184 .imm = 0 })
198 .imm = 0 })
213 .imm = IMM })
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| /linux/arch/arm64/kvm/ |
| H A D | trace_handle_exit.h | 30 TP_PROTO(unsigned long vcpu_pc, unsigned long r0, unsigned long imm),
31 TP_ARGS(vcpu_pc, r0, imm),
36 __field(unsigned long, imm)
42 __entry->imm = imm;
46 __entry->vcpu_pc, __entry->r0, __entry->imm)
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| /linux/arch/csky/abiv1/ |
| H A D | alignment.c | 219 uint32_t imm = 0; in csky_alignment() local
254 imm = (opcode >> 4) & 0xf; in csky_alignment()
263 addr = get_ptreg(regs, rx) + (imm << 1); in csky_alignment()
267 addr = get_ptreg(regs, rx) + (imm << 2); in csky_alignment()
271 addr = get_ptreg(regs, rx) + (imm << 1); in csky_alignment()
275 addr = get_ptreg(regs, rx) + (imm << 2); in csky_alignment()
294 __func__, opcode, rz, rx, imm, addr); in csky_alignment()
|