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Searched refs:ih_rb_cntl (Results 1 – 6 of 6) sorted by relevance

/linux/drivers/gpu/drm/amd/amdgpu/
H A Dtonga_ih.c62 u32 ih_rb_cntl = RREG32(mmIH_RB_CNTL); in tonga_ih_enable_interrupts() local
64 ih_rb_cntl = REG_SET_FIELD(ih_rb_cntl, IH_RB_CNTL, RB_ENABLE, 1); in tonga_ih_enable_interrupts()
65 ih_rb_cntl = REG_SET_FIELD(ih_rb_cntl, IH_RB_CNTL, ENABLE_INTR, 1); in tonga_ih_enable_interrupts()
66 WREG32(mmIH_RB_CNTL, ih_rb_cntl); in tonga_ih_enable_interrupts()
79 u32 ih_rb_cntl = RREG32(mmIH_RB_CNTL); in tonga_ih_disable_interrupts() local
81 ih_rb_cntl = REG_SET_FIELD(ih_rb_cntl, IH_RB_CNTL, RB_ENABLE, 0); in tonga_ih_disable_interrupts()
82 ih_rb_cntl = REG_SET_FIELD(ih_rb_cntl, IH_RB_CNTL, ENABLE_INTR, 0); in tonga_ih_disable_interrupts()
83 WREG32(mmIH_RB_CNTL, ih_rb_cntl); in tonga_ih_disable_interrupts()
104 u32 interrupt_cntl, ih_rb_cntl, ih_doorbell_rtpr; in tonga_ih_irq_init() local
126 ih_rb_cntl = REG_SET_FIELD(0, IH_RB_CNTL, WPTR_OVERFLOW_CLEAR, 1); in tonga_ih_irq_init()
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H A Diceland_ih.c63 u32 ih_rb_cntl = RREG32(mmIH_RB_CNTL); in iceland_ih_enable_interrupts() local
66 ih_rb_cntl = REG_SET_FIELD(ih_rb_cntl, IH_RB_CNTL, RB_ENABLE, 1); in iceland_ih_enable_interrupts()
68 WREG32(mmIH_RB_CNTL, ih_rb_cntl); in iceland_ih_enable_interrupts()
81 u32 ih_rb_cntl = RREG32(mmIH_RB_CNTL); in iceland_ih_disable_interrupts() local
84 ih_rb_cntl = REG_SET_FIELD(ih_rb_cntl, IH_RB_CNTL, RB_ENABLE, 0); in iceland_ih_disable_interrupts()
86 WREG32(mmIH_RB_CNTL, ih_rb_cntl); in iceland_ih_disable_interrupts()
110 u32 interrupt_cntl, ih_cntl, ih_rb_cntl; in iceland_ih_irq_init() local
130 ih_rb_cntl = REG_SET_FIELD(0, IH_RB_CNTL, WPTR_OVERFLOW_ENABLE, 1); in iceland_ih_irq_init()
131 ih_rb_cntl = REG_SET_FIELD(ih_rb_cntl, IH_RB_CNTL, WPTR_OVERFLOW_CLEAR, 1); in iceland_ih_irq_init()
132 ih_rb_cntl = REG_SET_FIELD(ih_rb_cntl, IH_RB_CNTL, RB_SIZE, rb_bufsz); in iceland_ih_irq_init()
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H A Dcz_ih.c63 u32 ih_rb_cntl = RREG32(mmIH_RB_CNTL); in cz_ih_enable_interrupts() local
66 ih_rb_cntl = REG_SET_FIELD(ih_rb_cntl, IH_RB_CNTL, RB_ENABLE, 1); in cz_ih_enable_interrupts()
68 WREG32(mmIH_RB_CNTL, ih_rb_cntl); in cz_ih_enable_interrupts()
81 u32 ih_rb_cntl = RREG32(mmIH_RB_CNTL); in cz_ih_disable_interrupts() local
84 ih_rb_cntl = REG_SET_FIELD(ih_rb_cntl, IH_RB_CNTL, RB_ENABLE, 0); in cz_ih_disable_interrupts()
86 WREG32(mmIH_RB_CNTL, ih_rb_cntl); in cz_ih_disable_interrupts()
109 u32 interrupt_cntl, ih_cntl, ih_rb_cntl; in cz_ih_irq_init() local
130 ih_rb_cntl = REG_SET_FIELD(0, IH_RB_CNTL, WPTR_OVERFLOW_ENABLE, 1); in cz_ih_irq_init()
131 ih_rb_cntl = REG_SET_FIELD(ih_rb_cntl, IH_RB_CNTL, WPTR_OVERFLOW_CLEAR, 1); in cz_ih_irq_init()
132 ih_rb_cntl = REG_SET_FIELD(ih_rb_cntl, IH_RB_CNTL, RB_SIZE, rb_bufsz); in cz_ih_irq_init()
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H A Dcik_ih.c63 u32 ih_rb_cntl = RREG32(mmIH_RB_CNTL); in cik_ih_enable_interrupts() local
66 ih_rb_cntl |= IH_RB_CNTL__RB_ENABLE_MASK; in cik_ih_enable_interrupts()
68 WREG32(mmIH_RB_CNTL, ih_rb_cntl); in cik_ih_enable_interrupts()
81 u32 ih_rb_cntl = RREG32(mmIH_RB_CNTL); in cik_ih_disable_interrupts() local
84 ih_rb_cntl &= ~IH_RB_CNTL__RB_ENABLE_MASK; in cik_ih_disable_interrupts()
86 WREG32(mmIH_RB_CNTL, ih_rb_cntl); in cik_ih_disable_interrupts()
110 u32 interrupt_cntl, ih_cntl, ih_rb_cntl; in cik_ih_irq_init() local
129 ih_rb_cntl = (IH_RB_CNTL__WPTR_OVERFLOW_ENABLE_MASK | in cik_ih_irq_init()
133 ih_rb_cntl |= IH_RB_CNTL__WPTR_WRITEBACK_ENABLE_MASK; in cik_ih_irq_init()
139 WREG32(mmIH_RB_CNTL, ih_rb_cntl); in cik_ih_irq_init()
H A Dsi_ih.c39 u32 ih_rb_cntl = RREG32(IH_RB_CNTL); in si_ih_enable_interrupts() local
42 ih_rb_cntl |= IH_RB_ENABLE; in si_ih_enable_interrupts()
44 WREG32(IH_RB_CNTL, ih_rb_cntl); in si_ih_enable_interrupts()
50 u32 ih_rb_cntl = RREG32(IH_RB_CNTL); in si_ih_disable_interrupts() local
53 ih_rb_cntl &= ~IH_RB_ENABLE; in si_ih_disable_interrupts()
55 WREG32(IH_RB_CNTL, ih_rb_cntl); in si_ih_disable_interrupts()
67 u32 interrupt_cntl, ih_cntl, ih_rb_cntl; in si_ih_irq_init() local
80 ih_rb_cntl = IH_WPTR_OVERFLOW_ENABLE | in si_ih_irq_init()
87 WREG32(IH_RB_CNTL, ih_rb_cntl); in si_ih_irq_init()
/linux/drivers/gpu/drm/radeon/
H A Dr600.c3593 u32 ih_rb_cntl = RREG32(IH_RB_CNTL); in r600_enable_interrupts() local
3596 ih_rb_cntl |= IH_RB_ENABLE; in r600_enable_interrupts()
3598 WREG32(IH_RB_CNTL, ih_rb_cntl); in r600_enable_interrupts()
3604 u32 ih_rb_cntl = RREG32(IH_RB_CNTL); in r600_disable_interrupts() local
3607 ih_rb_cntl &= ~IH_RB_ENABLE; in r600_disable_interrupts()
3609 WREG32(IH_RB_CNTL, ih_rb_cntl); in r600_disable_interrupts()
3675 u32 interrupt_cntl, ih_cntl, ih_rb_cntl; in r600_irq_init() local
3710 ih_rb_cntl = (IH_WPTR_OVERFLOW_ENABLE | in r600_irq_init()
3715 ih_rb_cntl |= IH_WPTR_WRITEBACK_ENABLE; in r600_irq_init()
3721 WREG32(IH_RB_CNTL, ih_rb_cntl); in r600_irq_init()