Home
last modified time | relevance | path

Searched refs:ih_rb_cntl (Results 1 – 6 of 6) sorted by relevance

/linux/drivers/gpu/drm/amd/amdgpu/
H A Dih_v6_1.c56 ih_regs->ih_rb_cntl = SOC15_REG_OFFSET(OSSSYS, 0, regIH_RB_CNTL); in ih_v6_1_init_register_offset()
69 ih_regs->ih_rb_cntl = SOC15_REG_OFFSET(OSSSYS, 0, regIH_RB_CNTL_RING1); in ih_v6_1_init_register_offset()
96 u32 ih_cntl, ih_rb_cntl; in force_update_wptr_for_self_int() local
99 ih_rb_cntl = RREG32_SOC15(OSSSYS, 0, regIH_RB_CNTL_RING1); in force_update_wptr_for_self_int()
105 ih_rb_cntl = REG_SET_FIELD(ih_rb_cntl, IH_RB_CNTL_RING1, in force_update_wptr_for_self_int()
109 if (psp_reg_program(&adev->psp, PSP_REG_IH_RB_CNTL_RING1, ih_rb_cntl)) in force_update_wptr_for_self_int()
112 WREG32_SOC15(OSSSYS, 0, regIH_RB_CNTL_RING1, ih_rb_cntl); in force_update_wptr_for_self_int()
136 tmp = RREG32(ih_regs->ih_rb_cntl); in ih_v6_1_toggle_ring_interrupts()
146 WREG32(ih_regs->ih_rb_cntl, tmp); in ih_v6_1_toggle_ring_interrupts()
187 static uint32_t ih_v6_1_rb_cntl(struct amdgpu_ih_ring *ih, uint32_t ih_rb_cntl) in ih_v6_1_rb_cntl() argument
[all …]
H A Diceland_ih.c63 u32 ih_rb_cntl = RREG32(mmIH_RB_CNTL); in iceland_ih_enable_interrupts() local
66 ih_rb_cntl = REG_SET_FIELD(ih_rb_cntl, IH_RB_CNTL, RB_ENABLE, 1); in iceland_ih_enable_interrupts()
68 WREG32(mmIH_RB_CNTL, ih_rb_cntl); in iceland_ih_enable_interrupts()
81 u32 ih_rb_cntl = RREG32(mmIH_RB_CNTL); in iceland_ih_disable_interrupts() local
84 ih_rb_cntl = REG_SET_FIELD(ih_rb_cntl, IH_RB_CNTL, RB_ENABLE, 0); in iceland_ih_disable_interrupts()
86 WREG32(mmIH_RB_CNTL, ih_rb_cntl); in iceland_ih_disable_interrupts()
110 u32 interrupt_cntl, ih_cntl, ih_rb_cntl; in iceland_ih_irq_init() local
130 ih_rb_cntl = REG_SET_FIELD(0, IH_RB_CNTL, WPTR_OVERFLOW_ENABLE, 1); in iceland_ih_irq_init()
131 ih_rb_cntl = REG_SET_FIELD(ih_rb_cntl, IH_RB_CNTL, WPTR_OVERFLOW_CLEAR, 1); in iceland_ih_irq_init()
132 ih_rb_cntl = REG_SET_FIELD(ih_rb_cntl, IH_RB_CNTL, RB_SIZE, rb_bufsz); in iceland_ih_irq_init()
[all …]
H A Dcz_ih.c63 u32 ih_rb_cntl = RREG32(mmIH_RB_CNTL); in cz_ih_enable_interrupts() local
66 ih_rb_cntl = REG_SET_FIELD(ih_rb_cntl, IH_RB_CNTL, RB_ENABLE, 1); in cz_ih_enable_interrupts()
68 WREG32(mmIH_RB_CNTL, ih_rb_cntl); in cz_ih_enable_interrupts()
81 u32 ih_rb_cntl = RREG32(mmIH_RB_CNTL); in cz_ih_disable_interrupts() local
84 ih_rb_cntl = REG_SET_FIELD(ih_rb_cntl, IH_RB_CNTL, RB_ENABLE, 0); in cz_ih_disable_interrupts()
86 WREG32(mmIH_RB_CNTL, ih_rb_cntl); in cz_ih_disable_interrupts()
109 u32 interrupt_cntl, ih_cntl, ih_rb_cntl; in cz_ih_irq_init() local
130 ih_rb_cntl = REG_SET_FIELD(0, IH_RB_CNTL, WPTR_OVERFLOW_ENABLE, 1); in cz_ih_irq_init()
131 ih_rb_cntl = REG_SET_FIELD(ih_rb_cntl, IH_RB_CNTL, WPTR_OVERFLOW_CLEAR, 1); in cz_ih_irq_init()
132 ih_rb_cntl = REG_SET_FIELD(ih_rb_cntl, IH_RB_CNTL, RB_SIZE, rb_bufsz); in cz_ih_irq_init()
[all …]
H A Dcik_ih.c63 u32 ih_rb_cntl = RREG32(mmIH_RB_CNTL); in cik_ih_enable_interrupts() local
66 ih_rb_cntl |= IH_RB_CNTL__RB_ENABLE_MASK; in cik_ih_enable_interrupts()
68 WREG32(mmIH_RB_CNTL, ih_rb_cntl); in cik_ih_enable_interrupts()
81 u32 ih_rb_cntl = RREG32(mmIH_RB_CNTL); in cik_ih_disable_interrupts() local
84 ih_rb_cntl &= ~IH_RB_CNTL__RB_ENABLE_MASK; in cik_ih_disable_interrupts()
86 WREG32(mmIH_RB_CNTL, ih_rb_cntl); in cik_ih_disable_interrupts()
110 u32 interrupt_cntl, ih_cntl, ih_rb_cntl; in cik_ih_irq_init() local
129 ih_rb_cntl = (IH_RB_CNTL__WPTR_OVERFLOW_ENABLE_MASK | in cik_ih_irq_init()
133 ih_rb_cntl |= IH_RB_CNTL__WPTR_WRITEBACK_ENABLE_MASK; in cik_ih_irq_init()
139 WREG32(mmIH_RB_CNTL, ih_rb_cntl); in cik_ih_irq_init()
H A Dsi_ih.c39 u32 ih_rb_cntl = RREG32(IH_RB_CNTL); in si_ih_enable_interrupts() local
42 ih_rb_cntl |= IH_RB_ENABLE; in si_ih_enable_interrupts()
44 WREG32(IH_RB_CNTL, ih_rb_cntl); in si_ih_enable_interrupts()
50 u32 ih_rb_cntl = RREG32(IH_RB_CNTL); in si_ih_disable_interrupts() local
53 ih_rb_cntl &= ~IH_RB_ENABLE; in si_ih_disable_interrupts()
55 WREG32(IH_RB_CNTL, ih_rb_cntl); in si_ih_disable_interrupts()
67 u32 interrupt_cntl, ih_cntl, ih_rb_cntl; in si_ih_irq_init() local
80 ih_rb_cntl = IH_WPTR_OVERFLOW_ENABLE | in si_ih_irq_init()
87 WREG32(IH_RB_CNTL, ih_rb_cntl); in si_ih_irq_init()
/linux/drivers/gpu/drm/radeon/
H A Dr600.c3593 u32 ih_rb_cntl = RREG32(IH_RB_CNTL); in r600_enable_interrupts() local
3596 ih_rb_cntl |= IH_RB_ENABLE; in r600_enable_interrupts()
3598 WREG32(IH_RB_CNTL, ih_rb_cntl); in r600_enable_interrupts()
3604 u32 ih_rb_cntl = RREG32(IH_RB_CNTL); in r600_disable_interrupts() local
3607 ih_rb_cntl &= ~IH_RB_ENABLE; in r600_disable_interrupts()
3609 WREG32(IH_RB_CNTL, ih_rb_cntl); in r600_disable_interrupts()
3675 u32 interrupt_cntl, ih_cntl, ih_rb_cntl; in r600_irq_init() local
3710 ih_rb_cntl = (IH_WPTR_OVERFLOW_ENABLE | in r600_irq_init()
3715 ih_rb_cntl |= IH_WPTR_WRITEBACK_ENABLE; in r600_irq_init()
3721 WREG32(IH_RB_CNTL, ih_rb_cntl); in r600_irq_init()