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Searched refs:ieee754_csr (Results 1 – 22 of 22) sorted by relevance

/linux/arch/mips/math-emu/
H A Ddp_simple.c16 if (ieee754_csr.abs2008) { in ieee754dp_neg()
22 oldrm = ieee754_csr.rm; in ieee754dp_neg()
23 ieee754_csr.rm = FPU_CSR_RD; in ieee754dp_neg()
25 ieee754_csr.rm = oldrm; in ieee754dp_neg()
34 if (ieee754_csr.abs2008) { in ieee754dp_abs()
40 oldrm = ieee754_csr.rm; in ieee754dp_abs()
41 ieee754_csr.rm = FPU_CSR_RD; in ieee754dp_abs()
46 ieee754_csr.rm = oldrm; in ieee754dp_abs()
H A Dsp_simple.c16 if (ieee754_csr.abs2008) { in ieee754sp_neg()
22 oldrm = ieee754_csr.rm; in ieee754sp_neg()
23 ieee754_csr.rm = FPU_CSR_RD; in ieee754sp_neg()
25 ieee754_csr.rm = oldrm; in ieee754sp_neg()
34 if (ieee754_csr.abs2008) { in ieee754sp_abs()
40 oldrm = ieee754_csr.rm; in ieee754sp_abs()
41 ieee754_csr.rm = FPU_CSR_RD; in ieee754sp_abs()
46 ieee754_csr.rm = oldrm; in ieee754sp_abs()
H A Ddp_sqrt.c66 oldcsr = ieee754_csr; in ieee754dp_sqrt()
67 ieee754_csr.mx &= ~IEEE754_INEXACT; in ieee754dp_sqrt()
68 ieee754_csr.sx &= ~IEEE754_INEXACT; in ieee754dp_sqrt()
69 ieee754_csr.rm = FPU_CSR_RN; in ieee754dp_sqrt()
113 ieee754_csr.rm = FPU_CSR_RZ; in ieee754dp_sqrt()
114 ieee754_csr.sx &= ~IEEE754_INEXACT; in ieee754dp_sqrt()
119 if (ieee754_csr.sx & IEEE754_INEXACT || t.bits != y.bits) { in ieee754dp_sqrt()
121 if (!(ieee754_csr.sx & IEEE754_INEXACT)) in ieee754dp_sqrt()
149 ieee754_csr = oldcsr; in ieee754dp_sqrt()
H A Dieee754.h170 #define ieee754_csr (*(struct _ieee754_csr *)(&current->thread.fpu.fcr31)) macro
174 return (ieee754_csr.rm); in ieee754_getrm()
179 return (ieee754_csr.rm = rm); in ieee754_setrm()
187 return (ieee754_csr.cx); in ieee754_getcx()
194 return (ieee754_csr.cx & n); in ieee754_cxtest()
202 return (ieee754_csr.sx); in ieee754_getsx()
209 return (ieee754_csr.sx = 0); in ieee754_clrsx()
216 return (ieee754_csr.sx & n); in ieee754_sxtest()
255 ieee754_csr.nan2008])
267 ieee754_csr.nan2008])
[all …]
H A Dieee754dp.c32 return ieee754_csr.nan2008 ^ qbit; in ieee754dp_issnan()
45 if (ieee754_csr.nan2008) { in ieee754dp_nanxcpt()
61 switch (ieee754_csr.rm) { in ieee754dp_get_rounding()
98 if (ieee754_csr.nod) { in ieee754dp_format()
102 switch(ieee754_csr.rm) { in ieee754dp_format()
166 switch (ieee754_csr.rm) { in ieee754dp_format()
188 if (ieee754_csr.mx & IEEE754_UNDERFLOW) in ieee754dp_format()
H A Dieee754sp.c32 return ieee754_csr.nan2008 ^ qbit; in ieee754sp_issnan()
45 if (ieee754_csr.nan2008) { in ieee754sp_nanxcpt()
61 switch (ieee754_csr.rm) { in ieee754sp_get_rounding()
98 if (ieee754_csr.nod) { in ieee754sp_format()
102 switch(ieee754_csr.rm) { in ieee754sp_format()
165 switch (ieee754_csr.rm) { in ieee754sp_format()
187 if (ieee754_csr.mx & IEEE754_UNDERFLOW) in ieee754sp_format()
H A Dieee754int.h24 ieee754_csr.cx = 0; in ieee754_clearcx()
29 ieee754_csr.cx |= flags; in ieee754_setcx()
30 ieee754_csr.sx |= flags; in ieee754_setcx()
37 return ieee754_csr.mx & x; in ieee754_setandtestcx()
62 else if (ieee754_csr.nan2008 ^ !(vm & SP_MBIT(SP_FBITS - 1))) \
100 else if (ieee754_csr.nan2008 ^ !(vm & DP_MBIT(DP_FBITS - 1))) \
122 if (ieee754_csr.nod) { \
133 if (ieee754_csr.nod) { \
H A Dsp_fdp.c40 if (!ieee754_csr.nan2008) { in ieee754sp_fdp()
57 if ((ieee754_csr.rm == FPU_CSR_RU && !xs) || in ieee754sp_fdp()
58 (ieee754_csr.rm == FPU_CSR_RD && xs)) in ieee754sp_fdp()
H A Ddp_sub.c83 return ieee754dp_zero(ieee754_csr.rm == FPU_CSR_RD); in ieee754dp_sub()
157 if (ieee754_csr.rm == FPU_CSR_RD) in ieee754dp_sub()
H A Ddp_add.c83 return ieee754dp_zero(ieee754_csr.rm == FPU_CSR_RD); in ieee754dp_add()
153 return ieee754dp_zero(ieee754_csr.rm == FPU_CSR_RD); in ieee754dp_add()
H A Dsp_sub.c83 return ieee754sp_zero(ieee754_csr.rm == FPU_CSR_RD); in ieee754sp_sub()
154 if (ieee754_csr.rm == FPU_CSR_RD) in ieee754sp_sub()
H A Dsp_add.c83 return ieee754sp_zero(ieee754_csr.rm == FPU_CSR_RD); in ieee754sp_add()
152 return ieee754sp_zero(ieee754_csr.rm == FPU_CSR_RD); in ieee754sp_add()
H A Dcp1emu.c1424 ieee754_csr_save = ieee754_csr; \
1426 ieee754_csr_save.cx |= ieee754_csr.cx; \
1427 ieee754_csr_save.sx |= ieee754_csr.sx; \
1429 ieee754_csr.cx |= ieee754_csr_save.cx; \
1430 ieee754_csr.sx |= ieee754_csr_save.sx; \
1998 oldrm = ieee754_csr.rm; in fpu_emu()
2000 ieee754_csr.rm = MIPSInst_FUNC(ir); in fpu_emu()
2002 ieee754_csr.rm = oldrm; in fpu_emu()
2044 oldrm = ieee754_csr.rm; in fpu_emu()
2046 ieee754_csr.rm = MIPSInst_FUNC(ir); in fpu_emu()
[all …]
H A Dsp_maddf.c115 return ieee754sp_zero(ieee754_csr.rm == FPU_CSR_RD); in _sp_maddf()
223 return ieee754sp_zero(ieee754_csr.rm == FPU_CSR_RD); in _sp_maddf()
H A Dsp_rint.c55 switch (ieee754_csr.rm) { in ieee754sp_rint()
H A Ddp_rint.c54 switch (ieee754_csr.rm) { in ieee754dp_rint()
H A Dsp_tint.c72 switch (ieee754_csr.rm) { in ieee754sp_tint()
H A Dsp_tlong.c68 switch (ieee754_csr.rm) { in ieee754sp_tlong()
H A Ddp_tint.c67 switch (ieee754_csr.rm) { in ieee754dp_tint()
H A Ddp_tlong.c72 switch (ieee754_csr.rm) { in ieee754dp_tlong()
H A Dsp_sqrt.c90 switch (ieee754_csr.rm) { in ieee754sp_sqrt()
H A Ddp_maddf.c146 return ieee754dp_zero(ieee754_csr.rm == FPU_CSR_RD); in _dp_maddf()
283 return ieee754dp_zero(ieee754_csr.rm == FPU_CSR_RD); in _dp_maddf()