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Searched refs:ib_cntl (Results 1 – 8 of 8) sorted by relevance

/linux/drivers/gpu/drm/amd/amdgpu/
H A Dsdma_v4_0.c923 u32 rb_cntl, ib_cntl; in sdma_v4_0_gfx_enable() local
930 ib_cntl = RREG32_SDMA(i, mmSDMA0_GFX_IB_CNTL); in sdma_v4_0_gfx_enable()
931 ib_cntl = REG_SET_FIELD(ib_cntl, SDMA0_GFX_IB_CNTL, IB_ENABLE, enable ? 1 : 0); in sdma_v4_0_gfx_enable()
932 WREG32_SDMA(i, mmSDMA0_GFX_IB_CNTL, ib_cntl); in sdma_v4_0_gfx_enable()
957 u32 rb_cntl, ib_cntl; in sdma_v4_0_page_stop() local
965 ib_cntl = RREG32_SDMA(i, mmSDMA0_PAGE_IB_CNTL); in sdma_v4_0_page_stop()
966 ib_cntl = REG_SET_FIELD(ib_cntl, SDMA0_PAGE_IB_CNTL, in sdma_v4_0_page_stop()
968 WREG32_SDMA(i, mmSDMA0_PAGE_IB_CNTL, ib_cntl); in sdma_v4_0_page_stop()
1091 u32 rb_cntl, ib_cntl, wptr_poll_cntl; in sdma_v4_0_gfx_resume() local
1155 ib_cntl = RREG32_SDMA(i, mmSDMA0_GFX_IB_CNTL); in sdma_v4_0_gfx_resume()
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H A Dvpe_v6_1.c212 uint32_t ib_cntl, i; in vpe_v6_1_ring_start() local
264 ib_cntl = RREG32(vpe_get_reg_offset(vpe, i, regVPEC_QUEUE0_IB_CNTL)); in vpe_v6_1_ring_start()
265 ib_cntl = REG_SET_FIELD(ib_cntl, VPEC_QUEUE0_IB_CNTL, IB_ENABLE, 1); in vpe_v6_1_ring_start()
266 WREG32(vpe_get_reg_offset(vpe, i, regVPEC_QUEUE0_IB_CNTL), ib_cntl); in vpe_v6_1_ring_start()
H A Dsdma_v7_1.c369 u32 rb_cntl, ib_cntl; in sdma_v7_1_inst_gfx_stop() local
376 ib_cntl = RREG32_SOC15_IP(GC, sdma_v7_1_get_reg_offset(adev, i, regSDMA0_SDMA_QUEUE0_IB_CNTL)); in sdma_v7_1_inst_gfx_stop()
377 ib_cntl = REG_SET_FIELD(ib_cntl, SDMA0_SDMA_QUEUE0_IB_CNTL, IB_ENABLE, 0); in sdma_v7_1_inst_gfx_stop()
378 WREG32_SOC15_IP(GC, sdma_v7_1_get_reg_offset(adev, i, regSDMA0_SDMA_QUEUE0_IB_CNTL), ib_cntl); in sdma_v7_1_inst_gfx_stop()
459 u32 rb_cntl, ib_cntl; in sdma_v7_1_gfx_resume_instance() local
585 ib_cntl = RREG32_SOC15_IP(GC, sdma_v7_1_get_reg_offset(adev, i, regSDMA0_SDMA_QUEUE0_IB_CNTL)); in sdma_v7_1_gfx_resume_instance()
586 ib_cntl = REG_SET_FIELD(ib_cntl, SDMA0_SDMA_QUEUE0_IB_CNTL, IB_ENABLE, 1); in sdma_v7_1_gfx_resume_instance()
588 ib_cntl = REG_SET_FIELD(ib_cntl, SDMA0_SDMA_QUEUE0_IB_CNTL, IB_SWAP_ENABLE, 1); in sdma_v7_1_gfx_resume_instance()
591 WREG32_SOC15_IP(GC, sdma_v7_1_get_reg_offset(adev, i, regSDMA0_SDMA_QUEUE0_IB_CNTL), ib_cntl); in sdma_v7_1_gfx_resume_instance()
H A Dsdma_v6_0.c396 u32 rb_cntl, ib_cntl; in sdma_v6_0_gfx_stop() local
403 ib_cntl = RREG32_SOC15_IP(GC, sdma_v6_0_get_reg_offset(adev, i, regSDMA0_QUEUE0_IB_CNTL)); in sdma_v6_0_gfx_stop()
404 ib_cntl = REG_SET_FIELD(ib_cntl, SDMA0_QUEUE0_IB_CNTL, IB_ENABLE, 0); in sdma_v6_0_gfx_stop()
405 WREG32_SOC15_IP(GC, sdma_v6_0_get_reg_offset(adev, i, regSDMA0_QUEUE0_IB_CNTL), ib_cntl); in sdma_v6_0_gfx_stop()
485 u32 rb_cntl, ib_cntl; in sdma_v6_0_gfx_resume_instance() local
609 ib_cntl = RREG32_SOC15_IP(GC, sdma_v6_0_get_reg_offset(adev, i, regSDMA0_QUEUE0_IB_CNTL)); in sdma_v6_0_gfx_resume_instance()
610 ib_cntl = REG_SET_FIELD(ib_cntl, SDMA0_QUEUE0_IB_CNTL, IB_ENABLE, 1); in sdma_v6_0_gfx_resume_instance()
612 ib_cntl = REG_SET_FIELD(ib_cntl, SDMA0_QUEUE0_IB_CNTL, IB_SWAP_ENABLE, 1); in sdma_v6_0_gfx_resume_instance()
615 WREG32_SOC15_IP(GC, sdma_v6_0_get_reg_offset(adev, i, regSDMA0_QUEUE0_IB_CNTL), ib_cntl); in sdma_v6_0_gfx_resume_instance()
H A Dsdma_v7_0.c399 u32 rb_cntl, ib_cntl; in sdma_v7_0_gfx_stop() local
406 ib_cntl = RREG32_SOC15_IP(GC, sdma_v7_0_get_reg_offset(adev, i, regSDMA0_QUEUE0_IB_CNTL)); in sdma_v7_0_gfx_stop()
407 ib_cntl = REG_SET_FIELD(ib_cntl, SDMA0_QUEUE0_IB_CNTL, IB_ENABLE, 0); in sdma_v7_0_gfx_stop()
408 WREG32_SOC15_IP(GC, sdma_v7_0_get_reg_offset(adev, i, regSDMA0_QUEUE0_IB_CNTL), ib_cntl); in sdma_v7_0_gfx_stop()
477 u32 rb_cntl, ib_cntl; in sdma_v7_0_gfx_resume_instance() local
603 ib_cntl = RREG32_SOC15_IP(GC, sdma_v7_0_get_reg_offset(adev, i, regSDMA0_QUEUE0_IB_CNTL)); in sdma_v7_0_gfx_resume_instance()
604 ib_cntl = REG_SET_FIELD(ib_cntl, SDMA0_QUEUE0_IB_CNTL, IB_ENABLE, 1); in sdma_v7_0_gfx_resume_instance()
606 ib_cntl = REG_SET_FIELD(ib_cntl, SDMA0_QUEUE0_IB_CNTL, IB_SWAP_ENABLE, 1); in sdma_v7_0_gfx_resume_instance()
609 WREG32_SOC15_IP(GC, sdma_v7_0_get_reg_offset(adev, i, regSDMA0_QUEUE0_IB_CNTL), ib_cntl); in sdma_v7_0_gfx_resume_instance()
/linux/drivers/gpu/drm/radeon/
H A Dni_dma.c189 u32 rb_cntl, dma_cntl, ib_cntl; in cayman_dma_resume() local
232 ib_cntl = DMA_IB_ENABLE | CMD_VMID_FORCE; in cayman_dma_resume()
234 ib_cntl |= DMA_IB_SWAP_ENABLE; in cayman_dma_resume()
236 WREG32(DMA_IB_CNTL + reg_offset, ib_cntl); in cayman_dma_resume()
H A Dr600_dma.c122 u32 rb_cntl, dma_cntl, ib_cntl; in r600_dma_resume() local
153 ib_cntl = DMA_IB_ENABLE; in r600_dma_resume()
155 ib_cntl |= DMA_IB_SWAP_ENABLE; in r600_dma_resume()
157 WREG32(DMA_IB_CNTL, ib_cntl); in r600_dma_resume()
H A Dcik_sdma.c367 u32 rb_cntl, ib_cntl; in cik_sdma_gfx_resume() local
416 ib_cntl = SDMA_IB_ENABLE; in cik_sdma_gfx_resume()
418 ib_cntl |= SDMA_IB_SWAP_ENABLE; in cik_sdma_gfx_resume()
421 WREG32(SDMA0_GFX_IB_CNTL + reg_offset, ib_cntl); in cik_sdma_gfx_resume()