Home
last modified time | relevance | path

Searched refs:ib_cntl (Results 1 – 7 of 7) sorted by relevance

/linux/drivers/gpu/drm/amd/amdgpu/
H A Dvpe_v6_1.c212 uint32_t ib_cntl, i; in vpe_v6_1_ring_start() local
264 ib_cntl = RREG32(vpe_get_reg_offset(vpe, i, regVPEC_QUEUE0_IB_CNTL)); in vpe_v6_1_ring_start()
265 ib_cntl = REG_SET_FIELD(ib_cntl, VPEC_QUEUE0_IB_CNTL, IB_ENABLE, 1); in vpe_v6_1_ring_start()
266 WREG32(vpe_get_reg_offset(vpe, i, regVPEC_QUEUE0_IB_CNTL), ib_cntl); in vpe_v6_1_ring_start()
H A Dsdma_v6_0.c397 u32 rb_cntl, ib_cntl; in sdma_v6_0_gfx_stop() local
404 ib_cntl = RREG32_SOC15_IP(GC, sdma_v6_0_get_reg_offset(adev, i, regSDMA0_QUEUE0_IB_CNTL)); in sdma_v6_0_gfx_stop()
405 ib_cntl = REG_SET_FIELD(ib_cntl, SDMA0_QUEUE0_IB_CNTL, IB_ENABLE, 0); in sdma_v6_0_gfx_stop()
406 WREG32_SOC15_IP(GC, sdma_v6_0_get_reg_offset(adev, i, regSDMA0_QUEUE0_IB_CNTL), ib_cntl); in sdma_v6_0_gfx_stop()
486 u32 rb_cntl, ib_cntl; in sdma_v6_0_gfx_resume_instance() local
610 ib_cntl = RREG32_SOC15_IP(GC, sdma_v6_0_get_reg_offset(adev, i, regSDMA0_QUEUE0_IB_CNTL)); in sdma_v6_0_gfx_resume_instance()
611 ib_cntl = REG_SET_FIELD(ib_cntl, SDMA0_QUEUE0_IB_CNTL, IB_ENABLE, 1); in sdma_v6_0_gfx_resume_instance()
613 ib_cntl = REG_SET_FIELD(ib_cntl, SDMA0_QUEUE0_IB_CNTL, IB_SWAP_ENABLE, 1); in sdma_v6_0_gfx_resume_instance()
616 WREG32_SOC15_IP(GC, sdma_v6_0_get_reg_offset(adev, i, regSDMA0_QUEUE0_IB_CNTL), ib_cntl); in sdma_v6_0_gfx_resume_instance()
H A Dsdma_v5_0.c565 u32 rb_cntl, ib_cntl; in sdma_v5_0_gfx_stop() local
572 ib_cntl = RREG32_SOC15_IP(GC, sdma_v5_0_get_reg_offset(adev, i, mmSDMA0_GFX_IB_CNTL)); in sdma_v5_0_gfx_stop()
573 ib_cntl = REG_SET_FIELD(ib_cntl, SDMA0_GFX_IB_CNTL, IB_ENABLE, 0); in sdma_v5_0_gfx_stop()
574 WREG32_SOC15_IP(GC, sdma_v5_0_get_reg_offset(adev, i, mmSDMA0_GFX_IB_CNTL), ib_cntl); in sdma_v5_0_gfx_stop()
691 u32 rb_cntl, ib_cntl; in sdma_v5_0_gfx_resume_instance() local
825 ib_cntl = RREG32_SOC15_IP(GC, sdma_v5_0_get_reg_offset(adev, i, mmSDMA0_GFX_IB_CNTL)); in sdma_v5_0_gfx_resume_instance()
826 ib_cntl = REG_SET_FIELD(ib_cntl, SDMA0_GFX_IB_CNTL, IB_ENABLE, 1); in sdma_v5_0_gfx_resume_instance()
828 ib_cntl = REG_SET_FIELD(ib_cntl, SDMA0_GFX_IB_CNTL, IB_SWAP_ENABLE, 1); in sdma_v5_0_gfx_resume_instance()
831 WREG32_SOC15_IP(GC, sdma_v5_0_get_reg_offset(adev, i, mmSDMA0_GFX_IB_CNTL), ib_cntl); in sdma_v5_0_gfx_resume_instance()
H A Dsdma_v5_2.c415 u32 rb_cntl, ib_cntl; in sdma_v5_2_gfx_stop() local
422 ib_cntl = RREG32_SOC15_IP(GC, sdma_v5_2_get_reg_offset(adev, i, mmSDMA0_GFX_IB_CNTL)); in sdma_v5_2_gfx_stop()
423 ib_cntl = REG_SET_FIELD(ib_cntl, SDMA0_GFX_IB_CNTL, IB_ENABLE, 0); in sdma_v5_2_gfx_stop()
424 WREG32_SOC15_IP(GC, sdma_v5_2_get_reg_offset(adev, i, mmSDMA0_GFX_IB_CNTL), ib_cntl); in sdma_v5_2_gfx_stop()
540 u32 rb_cntl, ib_cntl; in sdma_v5_2_gfx_resume_instance() local
672 ib_cntl = RREG32_SOC15_IP(GC, sdma_v5_2_get_reg_offset(adev, i, mmSDMA0_GFX_IB_CNTL)); in sdma_v5_2_gfx_resume_instance()
673 ib_cntl = REG_SET_FIELD(ib_cntl, SDMA0_GFX_IB_CNTL, IB_ENABLE, 1); in sdma_v5_2_gfx_resume_instance()
675 ib_cntl = REG_SET_FIELD(ib_cntl, SDMA0_GFX_IB_CNTL, IB_SWAP_ENABLE, 1); in sdma_v5_2_gfx_resume_instance()
678 WREG32_SOC15_IP(GC, sdma_v5_2_get_reg_offset(adev, i, mmSDMA0_GFX_IB_CNTL), ib_cntl); in sdma_v5_2_gfx_resume_instance()
/linux/drivers/gpu/drm/radeon/
H A Dni_dma.c189 u32 rb_cntl, dma_cntl, ib_cntl; in cayman_dma_resume() local
232 ib_cntl = DMA_IB_ENABLE | CMD_VMID_FORCE; in cayman_dma_resume()
234 ib_cntl |= DMA_IB_SWAP_ENABLE; in cayman_dma_resume()
236 WREG32(DMA_IB_CNTL + reg_offset, ib_cntl); in cayman_dma_resume()
H A Dr600_dma.c122 u32 rb_cntl, dma_cntl, ib_cntl; in r600_dma_resume() local
153 ib_cntl = DMA_IB_ENABLE; in r600_dma_resume()
155 ib_cntl |= DMA_IB_SWAP_ENABLE; in r600_dma_resume()
157 WREG32(DMA_IB_CNTL, ib_cntl); in r600_dma_resume()
H A Dcik_sdma.c367 u32 rb_cntl, ib_cntl; in cik_sdma_gfx_resume() local
416 ib_cntl = SDMA_IB_ENABLE; in cik_sdma_gfx_resume()
418 ib_cntl |= SDMA_IB_SWAP_ENABLE; in cik_sdma_gfx_resume()
421 WREG32(SDMA0_GFX_IB_CNTL + reg_offset, ib_cntl); in cik_sdma_gfx_resume()