| /linux/drivers/gpu/drm/radeon/ |
| H A D | radeon_ib.c | 61 struct radeon_ib *ib, struct radeon_vm *vm, in radeon_ib_get() argument 66 r = radeon_sa_bo_new(&rdev->ring_tmp_bo, &ib->sa_bo, size, 256); in radeon_ib_get() 72 radeon_sync_create(&ib->sync); in radeon_ib_get() 74 ib->ring = ring; in radeon_ib_get() 75 ib->fence = NULL; in radeon_ib_get() 76 ib->ptr = radeon_sa_bo_cpu_addr(ib->sa_bo); in radeon_ib_get() 77 ib->vm = vm; in radeon_ib_get() 82 ib->gpu_addr = drm_suballoc_soffset(ib->sa_bo) + RADEON_VA_IB_OFFSET; in radeon_ib_get() 84 ib->gpu_addr = radeon_sa_bo_gpu_addr(ib->sa_bo); in radeon_ib_get() 86 ib->is_const_ib = false; in radeon_ib_get() [all …]
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| H A D | si_dma.c | 69 struct radeon_ib *ib, in si_dma_vm_copy_pages() argument 78 ib->ptr[ib->length_dw++] = DMA_PACKET(DMA_PACKET_COPY, in si_dma_vm_copy_pages() 80 ib->ptr[ib->length_dw++] = lower_32_bits(pe); in si_dma_vm_copy_pages() 81 ib->ptr[ib->length_dw++] = lower_32_bits(src); in si_dma_vm_copy_pages() 82 ib->ptr[ib->length_dw++] = upper_32_bits(pe) & 0xff; in si_dma_vm_copy_pages() 83 ib->ptr[ib->length_dw++] = upper_32_bits(src) & 0xff; in si_dma_vm_copy_pages() 105 struct radeon_ib *ib, in si_dma_vm_write_pages() argument 119 ib->ptr[ib->length_dw++] = DMA_PACKET(DMA_PACKET_WRITE, 0, 0, 0, ndw); in si_dma_vm_write_pages() 120 ib->ptr[ib->length_dw++] = pe; in si_dma_vm_write_pages() 121 ib->ptr[ib->length_dw++] = upper_32_bits(pe) & 0xff; in si_dma_vm_write_pages() [all …]
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| H A D | ni_dma.c | 122 struct radeon_ib *ib) in cayman_dma_ring_ib_execute() argument 124 struct radeon_ring *ring = &rdev->ring[ib->ring]; in cayman_dma_ring_ib_execute() 125 unsigned vm_id = ib->vm ? ib->vm->ids[ib->ring].id : 0; in cayman_dma_ring_ib_execute() 144 radeon_ring_write(ring, (ib->gpu_addr & 0xFFFFFFE0)); in cayman_dma_ring_ib_execute() 145 radeon_ring_write(ring, (ib->length_dw << 12) | (upper_32_bits(ib->gpu_addr) & 0xFF)); in cayman_dma_ring_ib_execute() 315 struct radeon_ib *ib, in cayman_dma_vm_copy_pages() argument 326 ib->ptr[ib->length_dw++] = DMA_PACKET(DMA_PACKET_COPY, in cayman_dma_vm_copy_pages() 328 ib->ptr[ib->length_dw++] = lower_32_bits(pe); in cayman_dma_vm_copy_pages() 329 ib->ptr[ib->length_dw++] = lower_32_bits(src); in cayman_dma_vm_copy_pages() 330 ib->ptr[ib->length_dw++] = upper_32_bits(pe) & 0xff; in cayman_dma_vm_copy_pages() [all …]
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| H A D | cik_sdma.c | 133 struct radeon_ib *ib) in cik_sdma_ring_ib_execute() argument 135 struct radeon_ring *ring = &rdev->ring[ib->ring]; in cik_sdma_ring_ib_execute() 136 u32 extra_bits = (ib->vm ? ib->vm->ids[ib->ring].id : 0) & 0xf; in cik_sdma_ring_ib_execute() 154 radeon_ring_write(ring, ib->gpu_addr & 0xffffffe0); /* base must be 32 byte aligned */ in cik_sdma_ring_ib_execute() 155 radeon_ring_write(ring, upper_32_bits(ib->gpu_addr)); in cik_sdma_ring_ib_execute() 156 radeon_ring_write(ring, ib->length_dw); in cik_sdma_ring_ib_execute() 703 struct radeon_ib ib; in cik_sdma_ib_test() local 720 r = radeon_ib_get(rdev, ring->idx, &ib, NULL, 256); in cik_sdma_ib_test() 726 ib.ptr[0] = SDMA_PACKET(SDMA_OPCODE_WRITE, SDMA_WRITE_SUB_OPCODE_LINEAR, 0); in cik_sdma_ib_test() 727 ib.ptr[1] = lower_32_bits(gpu_addr); in cik_sdma_ib_test() [all …]
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| H A D | evergreen_cs.c | 454 uint32_t *ib = p->ib.ptr; in evergreen_cs_track_validate_cb() local 476 ib[track->cb_color_slice_idx[id]] = slice; in evergreen_cs_track_validate_cb() 1101 u32 tmp, *ib; in evergreen_cs_handle_reg() local 1104 ib = p->ib.ptr; in evergreen_cs_handle_reg() 1152 ib[idx] += (u32)((reloc->gpu_offset >> 8) & 0xffffffff); in evergreen_cs_handle_reg() 1181 ib[idx] &= ~Z_ARRAY_MODE(0xf); in evergreen_cs_handle_reg() 1183 ib[idx] |= Z_ARRAY_MODE(evergreen_cs_get_aray_mode(reloc->tiling_flags)); in evergreen_cs_handle_reg() 1191 ib[idx] |= DB_NUM_BANKS(evergreen_cs_get_num_banks(track->nbanks)); in evergreen_cs_handle_reg() 1192 ib[idx] |= DB_TILE_SPLIT(tile_split) | in evergreen_cs_handle_reg() 1224 ib[idx] += (u32)((reloc->gpu_offset >> 8) & 0xffffffff); in evergreen_cs_handle_reg() [all …]
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| H A D | radeon_vm.c | 358 struct radeon_ib *ib, in radeon_vm_set_pages() argument 367 radeon_asic_vm_copy_pages(rdev, ib, pe, src, count); in radeon_vm_set_pages() 370 radeon_asic_vm_write_pages(rdev, ib, pe, addr, in radeon_vm_set_pages() 374 radeon_asic_vm_set_pages(rdev, ib, pe, addr, in radeon_vm_set_pages() 389 struct radeon_ib ib; in radeon_vm_clear_bo() local 405 r = radeon_ib_get(rdev, R600_RING_TYPE_DMA_INDEX, &ib, NULL, 256); in radeon_vm_clear_bo() 409 ib.length_dw = 0; in radeon_vm_clear_bo() 411 radeon_vm_set_pages(rdev, &ib, addr, 0, entries, 0, 0); in radeon_vm_clear_bo() 412 radeon_asic_vm_pad_ib(rdev, &ib); in radeon_vm_clear_bo() 413 WARN_ON(ib.length_dw > 64); in radeon_vm_clear_bo() [all …]
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| H A D | r600_cs.c | 356 volatile u32 *ib = p->ib.ptr; in r600_cs_track_validate_cb() local 468 ib[track->cb_color_size_idx[i]] = tmp; in r600_cs_track_validate_cb() 527 volatile u32 *ib = p->ib.ptr; in r600_cs_track_validate_db() local 567 ib[track->db_depth_size_idx] = S_028000_SLICE_TILE_MAX(tmp - 1) | (track->db_depth_size & 0x3FF); in r600_cs_track_validate_db() 837 volatile uint32_t *ib; in r600_cs_common_vline_parse() local 839 ib = p->ib.ptr; in r600_cs_common_vline_parse() 902 ib[h_idx + 2] = PACKET2(0); in r600_cs_common_vline_parse() 903 ib[h_idx + 3] = PACKET2(0); in r600_cs_common_vline_parse() 904 ib[h_idx + 4] = PACKET2(0); in r600_cs_common_vline_parse() 905 ib[h_idx + 5] = PACKET2(0); in r600_cs_common_vline_parse() [all …]
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| H A D | r600_dma.c | 338 struct radeon_ib ib; in r600_dma_ib_test() local 352 r = radeon_ib_get(rdev, ring->idx, &ib, NULL, 256); in r600_dma_ib_test() 358 ib.ptr[0] = DMA_PACKET(DMA_PACKET_WRITE, 0, 0, 1); in r600_dma_ib_test() 359 ib.ptr[1] = lower_32_bits(gpu_addr); in r600_dma_ib_test() 360 ib.ptr[2] = upper_32_bits(gpu_addr) & 0xff; in r600_dma_ib_test() 361 ib.ptr[3] = 0xDEADBEEF; in r600_dma_ib_test() 362 ib.length_dw = 4; in r600_dma_ib_test() 364 r = radeon_ib_schedule(rdev, &ib, NULL, false); in r600_dma_ib_test() 366 radeon_ib_free(rdev, &ib); in r600_dma_ib_test() 370 r = radeon_fence_wait_timeout(ib.fence, false, usecs_to_jiffies( in r600_dma_ib_test() [all …]
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| H A D | evergreen_dma.c | 67 struct radeon_ib *ib) in evergreen_dma_ring_ib_execute() argument 69 struct radeon_ring *ring = &rdev->ring[ib->ring]; in evergreen_dma_ring_ib_execute() 88 radeon_ring_write(ring, (ib->gpu_addr & 0xFFFFFFE0)); in evergreen_dma_ring_ib_execute() 89 radeon_ring_write(ring, (ib->length_dw << 12) | (upper_32_bits(ib->gpu_addr) & 0xFF)); in evergreen_dma_ring_ib_execute()
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| H A D | radeon_cs.c | 191 p->vm_bos = radeon_vm_get_bos(p->rdev, p->ib.vm, in radeon_cs_parser_relocs() 256 r = radeon_sync_resv(p->rdev, &p->ib.sync, resv, reloc->shared); in radeon_cs_sync_rings() 282 p->ib.sa_bo = NULL; in radeon_cs_parser_init() 435 &parser->ib.fence->base, in radeon_cs_parser_fini() 460 radeon_ib_free(parser->rdev, &parser->ib); in radeon_cs_parser_fini() 494 r = radeon_ib_schedule(rdev, &parser->ib, NULL, true); in radeon_cs_ib_chunk() 540 radeon_sync_fence(&p->ib.sync, bo_va->last_pt_update); in radeon_bo_vm_update_pte() 569 r = radeon_ring_ib_parse(rdev, parser->ring, &parser->ib); in radeon_cs_ib_vm_chunk() 592 r = radeon_ib_schedule(rdev, &parser->ib, &parser->const_ib, true); in radeon_cs_ib_vm_chunk() 594 r = radeon_ib_schedule(rdev, &parser->ib, NULL, true); in radeon_cs_ib_vm_chunk() [all …]
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| /linux/arch/s390/include/asm/ |
| H A D | idals.h | 135 struct idal_buffer *ib; in idal_buffer_alloc() local 140 ib = kmalloc_flex(*ib, data, nr_ptrs, GFP_DMA | GFP_KERNEL); in idal_buffer_alloc() 141 if (!ib) in idal_buffer_alloc() 143 ib->size = size; in idal_buffer_alloc() 144 ib->page_order = page_order; in idal_buffer_alloc() 147 ib->data[i] = dma64_add(ib->data[i - 1], IDA_BLOCK_SIZE); in idal_buffer_alloc() 153 ib->data[i] = virt_to_dma64(vaddr); in idal_buffer_alloc() 155 return ib; in idal_buffer_alloc() 159 vaddr = dma64_to_virt(ib->data[i]); in idal_buffer_alloc() 160 free_pages((unsigned long)vaddr, ib->page_order); in idal_buffer_alloc() [all …]
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| /linux/drivers/net/ethernet/amd/ |
| H A D | 7990.c | 100 t, ib->brx_ring[t].rmd1_hadr, ib->brx_ring[t].rmd0, \ 101 ib->brx_ring[t].length, \ 102 ib->brx_ring[t].mblength, ib->brx_ring[t].rmd1_bits); \ 106 t, ib->btx_ring[t].tmd1_hadr, ib->btx_ring[t].tmd0, \ 107 ib->btx_ring[t].length, \ 108 ib->btx_ring[t].misc, ib->btx_ring[t].tmd1_bits); \ 140 volatile struct lance_init_block *ib = lp->init_block; in lance_init_ring() local 150 ib->mode = LE_MO_PROM; /* normal, enable Tx & Rx */ in lance_init_ring() 163 ib->phys_addr[0] = dev->dev_addr[1]; in lance_init_ring() 164 ib->phys_addr[1] = dev->dev_addr[0]; in lance_init_ring() [all …]
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| H A D | sunlance.c | 319 struct lance_init_block *ib = lp->init_block_mem; in lance_init_ring_dvma() local 332 ib->phys_addr [0] = dev->dev_addr [1]; in lance_init_ring_dvma() 333 ib->phys_addr [1] = dev->dev_addr [0]; in lance_init_ring_dvma() 334 ib->phys_addr [2] = dev->dev_addr [3]; in lance_init_ring_dvma() 335 ib->phys_addr [3] = dev->dev_addr [2]; in lance_init_ring_dvma() 336 ib->phys_addr [4] = dev->dev_addr [5]; in lance_init_ring_dvma() 337 ib->phys_addr [5] = dev->dev_addr [4]; in lance_init_ring_dvma() 342 ib->btx_ring [i].tmd0 = leptr; in lance_init_ring_dvma() 343 ib->btx_ring [i].tmd1_hadr = leptr >> 16; in lance_init_ring_dvma() 344 ib->btx_ring [i].tmd1_bits = 0; in lance_init_ring_dvma() [all …]
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| /linux/fs/ntfs/ |
| H A D | index.c | 86 else if (ictx->ib) in ntfs_index_entry_mark_dirty() 100 static int ntfs_ib_write(struct ntfs_index_context *icx, struct index_block *ib) in ntfs_ib_write() argument 102 s64 ret, vcn = le64_to_cpu(ib->index_block_vcn); in ntfs_ib_write() 106 ret = pre_write_mst_fixup((struct ntfs_record *)ib, icx->block_size); in ntfs_ib_write() 112 (u8 *)ib, icx->sync_write); in ntfs_ib_write() 115 post_write_mst_fixup((struct ntfs_record *)ib); in ntfs_ib_write() 130 err = ntfs_ib_write(icx, icx->ib); in ntfs_icx_ib_write() 148 ret = ntfs_ib_write(icx, icx->ib); in ntfs_icx_ib_sync_write() 150 kvfree(icx->ib); in ntfs_icx_ib_sync_write() 151 icx->ib = NULL; in ntfs_icx_ib_sync_write() [all …]
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| /linux/drivers/infiniband/hw/mlx4/ |
| H A D | ah.c | 48 ah->av.ib.port_pd = cpu_to_be32(to_mpd(ib_ah->pd)->pdn | in create_ib_ah() 50 ah->av.ib.g_slid = rdma_ah_get_path_bits(ah_attr); in create_ib_ah() 51 ah->av.ib.sl_tclass_flowlabel = in create_ib_ah() 56 ah->av.ib.g_slid |= 0x80; in create_ib_ah() 57 ah->av.ib.gid_index = grh->sgid_index; in create_ib_ah() 58 ah->av.ib.hop_limit = grh->hop_limit; in create_ib_ah() 59 ah->av.ib.sl_tclass_flowlabel |= in create_ib_ah() 62 memcpy(ah->av.ib.dgid, grh->dgid.raw, 16); in create_ib_ah() 65 ah->av.ib.dlid = cpu_to_be16(rdma_ah_get_dlid(ah_attr)); in create_ib_ah() 73 ah->av.ib.stat_rate = static_rate; in create_ib_ah() [all …]
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| /linux/drivers/s390/char/ |
| H A D | fs3270.c | 242 struct idal_buffer *ib; in fs3270_read() local 250 ib = idal_buffer_alloc(count, 0); in fs3270_read() 251 if (IS_ERR(ib)) in fs3270_read() 258 raw3270_request_set_idal(rq, ib); in fs3270_read() 265 if (idal_buffer_to_user(ib, data, count) != 0) in fs3270_read() 275 idal_buffer_free(ib); in fs3270_read() 287 struct idal_buffer *ib; in fs3270_write() local 294 ib = idal_buffer_alloc(count, 0); in fs3270_write() 295 if (IS_ERR(ib)) in fs3270_write() 299 if (idal_buffer_from_user(ib, data, count) == 0) { in fs3270_write() [all …]
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| /linux/fs/smb/server/ |
| H A D | ksmbd_work.c | 130 static inline void __ksmbd_iov_pin(struct ksmbd_work *work, void *ib, in __ksmbd_iov_pin() argument 133 work->iov[++work->iov_idx].iov_base = ib; in __ksmbd_iov_pin() 138 static int __ksmbd_iov_pin_rsp(struct ksmbd_work *work, void *ib, int len, in __ksmbd_iov_pin_rsp() argument 164 __ksmbd_iov_pin(work, ib, len); in __ksmbd_iov_pin_rsp() 178 int ksmbd_iov_pin_rsp(struct ksmbd_work *work, void *ib, int len) in ksmbd_iov_pin_rsp() argument 180 return __ksmbd_iov_pin_rsp(work, ib, len, NULL, 0); in ksmbd_iov_pin_rsp() 183 int ksmbd_iov_pin_rsp_read(struct ksmbd_work *work, void *ib, int len, in ksmbd_iov_pin_rsp_read() argument 186 return __ksmbd_iov_pin_rsp(work, ib, len, aux_buf, aux_size); in ksmbd_iov_pin_rsp_read()
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| /linux/drivers/net/ethernet/brocade/bna/ |
| H A D | bna_hw_defs.h | 236 struct bna_ib *ib = _ib; \ 237 if ((ib->intr_type == BNA_INTR_T_INTX)) { \ 239 intx_mask &= ~(ib->intr_vector); \ 242 bna_ib_coalescing_timer_set(&ib->door_bell, \ 243 ib->coalescing_timeo); \ 245 bna_ib_ack(&ib->door_bell, 0); \ 251 struct bna_ib *ib = _ib; \ 253 ib->door_bell.doorbell_addr); \ 254 if (ib->intr_type == BNA_INTR_T_INTX) { \ 256 intx_mask |= ib->intr_vector; \
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| /linux/drivers/gpu/drm/amd/amdgpu/ |
| H A D | amdgpu_uvd.c | 102 struct amdgpu_ib *ib; member 588 lo = amdgpu_ib_get_value(ctx->ib, ctx->data0); in amdgpu_uvd_get_addr_from_ctx() 589 hi = amdgpu_ib_get_value(ctx->ib, ctx->data1); in amdgpu_uvd_get_addr_from_ctx() 620 cmd = amdgpu_ib_get_value(ctx->ib, ctx->idx) >> 1; in amdgpu_uvd_cs_pass1() 913 amdgpu_ib_set_value(ctx->ib, ctx->data0, lower_32_bits(start)); in amdgpu_uvd_cs_pass2() 914 amdgpu_ib_set_value(ctx->ib, ctx->data1, upper_32_bits(start)); in amdgpu_uvd_cs_pass2() 916 cmd = amdgpu_ib_get_value(ctx->ib, ctx->idx) >> 1; in amdgpu_uvd_cs_pass2() 983 if (ctx->idx >= ctx->ib->length_dw) { in amdgpu_uvd_cs_reg() 1025 for (ctx->idx = 0 ; ctx->idx < ctx->ib->length_dw; ) { in amdgpu_uvd_cs_packets() 1026 uint32_t cmd = amdgpu_ib_get_value(ctx->ib, ctx->idx); in amdgpu_uvd_cs_packets() [all …]
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| H A D | vcn_sw_ring.c | 45 struct amdgpu_ib *ib, uint32_t flags) in vcn_dec_sw_ring_emit_ib() argument 51 amdgpu_ring_write(ring, lower_32_bits(ib->gpu_addr)); in vcn_dec_sw_ring_emit_ib() 52 amdgpu_ring_write(ring, upper_32_bits(ib->gpu_addr)); in vcn_dec_sw_ring_emit_ib() 53 amdgpu_ring_write(ring, ib->length_dw); in vcn_dec_sw_ring_emit_ib()
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| H A D | amdgpu_mes_ctx.h | 71 uint32_t ib[256] __aligned(256); member 85 uint32_t ib[256] __aligned(256); member 100 uint32_t ib[256] __aligned(256); member
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| /linux/drivers/tee/qcomtee/ |
| H A D | core.c | 403 int i, ib, ob, io, oo; in qcomtee_prepare_msg() local 417 ib = 0; in qcomtee_prepare_msg() 421 msg->args[ib].b.offset = offset; in qcomtee_prepare_msg() 422 msg->args[ib].b.size = u[i].b.size; in qcomtee_prepare_msg() 432 ib++; in qcomtee_prepare_msg() 435 ob = ib; in qcomtee_prepare_msg() 463 qcomtee_msg_init(msg, object_id, op, ib, ob, io, oo); in qcomtee_prepare_msg() 486 int i, ib, ob, io, oo; in qcomtee_update_args() local 492 ib = 0; in qcomtee_update_args() 494 ib++; in qcomtee_update_args() [all …]
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| /linux/fs/smb/smbdirect/ |
| H A D | rw.c | 71 sc->ib.qp, in smbdirect_connection_rw_io_free() 72 sc->ib.qp->port, in smbdirect_connection_rw_io_free() 204 sc->ib.qp, in smbdirect_connection_rdma_xmit() 205 sc->ib.qp->port, in smbdirect_connection_rdma_xmit() 225 sc->ib.qp, in smbdirect_connection_rdma_xmit() 226 sc->ib.qp->port, in smbdirect_connection_rdma_xmit() 231 ret = ib_post_send(sc->ib.qp, first_wr, NULL); in smbdirect_connection_rdma_xmit()
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| /linux/arch/arm/boot/dts/marvell/ |
| H A D | kirkwood-ib62x0.dts | 9 …compatible = "raidsonic,ib-nas6210-b", "raidsonic,ib-nas6220-b", "raidsonic,ib-nas6210", "raidsoni…
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| /linux/drivers/pinctrl/meson/ |
| H A D | pinctrl-meson.h | 146 #define BANK_DS(n, f, l, fi, li, per, peb, pr, pb, dr, db, or, ob, ir, ib, \ argument 159 [MESON_REG_IN] = { ir, ib }, \ 164 #define BANK(n, f, l, fi, li, per, peb, pr, pb, dr, db, or, ob, ir, ib) \ argument 165 BANK_DS(n, f, l, fi, li, per, peb, pr, pb, dr, db, or, ob, ir, ib, 0, 0)
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