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Searched refs:ib (Results 1 – 25 of 101) sorted by relevance

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/linux/drivers/gpu/drm/amd/amdgpu/
H A Damdgpu_vce.c467 struct amdgpu_ib *ib; in amdgpu_vce_get_create_msg() local
489 ib = &job->ibs[0]; in amdgpu_vce_get_create_msg()
494 ib->length_dw = 0; in amdgpu_vce_get_create_msg()
495 ib->ptr[ib->length_dw++] = 0x0000000c; /* len */ in amdgpu_vce_get_create_msg()
496 ib->ptr[ib->length_dw++] = 0x00000001; /* session cmd */ in amdgpu_vce_get_create_msg()
497 ib->ptr[ib->length_dw++] = handle; in amdgpu_vce_get_create_msg()
500 ib->ptr[ib->length_dw++] = 0x00000040; /* len */ in amdgpu_vce_get_create_msg()
502 ib->ptr[ib->length_dw++] = 0x00000030; /* len */ in amdgpu_vce_get_create_msg()
503 ib->ptr[ib->length_dw++] = 0x01000001; /* create cmd */ in amdgpu_vce_get_create_msg()
504 ib->ptr[ib->length_dw++] = 0x00000000; in amdgpu_vce_get_create_msg()
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H A Dsdma_v7_0.c269 struct amdgpu_ib *ib, in sdma_v7_0_ring_emit_ib() argument
288 amdgpu_ring_write(ring, lower_32_bits(ib->gpu_addr) & 0xffffffe0); in sdma_v7_0_ring_emit_ib()
289 amdgpu_ring_write(ring, upper_32_bits(ib->gpu_addr)); in sdma_v7_0_ring_emit_ib()
290 amdgpu_ring_write(ring, ib->length_dw); in sdma_v7_0_ring_emit_ib()
982 struct amdgpu_ib ib; in sdma_v7_0_ring_test_ib() local
990 memset(&ib, 0, sizeof(ib)); in sdma_v7_0_ring_test_ib()
1001 r = amdgpu_ib_get(adev, NULL, 256, AMDGPU_IB_POOL_DIRECT, &ib); in sdma_v7_0_ring_test_ib()
1007 ib.ptr[0] = SDMA_PKT_COPY_LINEAR_HEADER_OP(SDMA_OP_WRITE) | in sdma_v7_0_ring_test_ib()
1009 ib.ptr[1] = lower_32_bits(gpu_addr); in sdma_v7_0_ring_test_ib()
1010 ib.ptr[2] = upper_32_bits(gpu_addr); in sdma_v7_0_ring_test_ib()
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H A Dsdma_v7_1.c256 * @ib: IB object to schedule
263 struct amdgpu_ib *ib, in sdma_v7_1_ring_emit_ib() argument
282 amdgpu_ring_write(ring, lower_32_bits(ib->gpu_addr) & 0xffffffe0); in sdma_v7_1_ring_emit_ib()
283 amdgpu_ring_write(ring, upper_32_bits(ib->gpu_addr)); in sdma_v7_1_ring_emit_ib()
284 amdgpu_ring_write(ring, ib->length_dw); in sdma_v7_1_ring_emit_ib()
972 struct amdgpu_ib ib; in sdma_v7_1_ring_test_ib() local
980 memset(&ib, 0, sizeof(ib)); in sdma_v7_1_ring_test_ib()
991 r = amdgpu_ib_get(adev, NULL, 256, AMDGPU_IB_POOL_DIRECT, &ib); in sdma_v7_1_ring_test_ib()
993 DRM_ERROR("amdgpu: failed to get ib ( in sdma_v7_1_ring_test_ib()
1048 sdma_v7_1_vm_copy_pte(struct amdgpu_ib * ib,uint64_t pe,uint64_t src,unsigned count) sdma_v7_1_vm_copy_pte() argument
1077 sdma_v7_1_vm_write_pte(struct amdgpu_ib * ib,uint64_t pe,uint64_t value,unsigned count,uint32_t incr) sdma_v7_1_vm_write_pte() argument
1107 sdma_v7_1_vm_set_pte_pde(struct amdgpu_ib * ib,uint64_t pe,uint64_t addr,unsigned count,uint32_t incr,uint64_t flags) sdma_v7_1_vm_set_pte_pde() argument
1151 sdma_v7_1_ring_pad_ib(struct amdgpu_ring * ring,struct amdgpu_ib * ib) sdma_v7_1_ring_pad_ib() argument
1716 sdma_v7_1_emit_copy_buffer(struct amdgpu_ib * ib,uint64_t src_offset,uint64_t dst_offset,uint32_t byte_count,uint32_t copy_flags) sdma_v7_1_emit_copy_buffer() argument
1744 sdma_v7_1_emit_fill_buffer(struct amdgpu_ib * ib,uint32_t src_data,uint64_t dst_offset,uint32_t byte_count) sdma_v7_1_emit_fill_buffer() argument
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H A Dsdma_v6_0.c267 struct amdgpu_ib *ib, in sdma_v6_0_ring_emit_ib() argument
286 amdgpu_ring_write(ring, lower_32_bits(ib->gpu_addr) & 0xffffffe0); in sdma_v6_0_ring_emit_ib()
287 amdgpu_ring_write(ring, upper_32_bits(ib->gpu_addr)); in sdma_v6_0_ring_emit_ib()
288 amdgpu_ring_write(ring, ib->length_dw); in sdma_v6_0_ring_emit_ib()
967 struct amdgpu_ib ib; in sdma_v6_0_ring_test_ib() local
975 memset(&ib, 0, sizeof(ib)); in sdma_v6_0_ring_test_ib()
986 r = amdgpu_ib_get(adev, NULL, 256, AMDGPU_IB_POOL_DIRECT, &ib); in sdma_v6_0_ring_test_ib()
992 ib.ptr[0] = SDMA_PKT_COPY_LINEAR_HEADER_OP(SDMA_OP_WRITE) | in sdma_v6_0_ring_test_ib()
994 ib.ptr[1] = lower_32_bits(gpu_addr); in sdma_v6_0_ring_test_ib()
995 ib.ptr[2] = upper_32_bits(gpu_addr); in sdma_v6_0_ring_test_ib()
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H A Dsdma_v5_0.c431 struct amdgpu_ib *ib, in sdma_v5_0_ring_emit_ib() argument
450 amdgpu_ring_write(ring, lower_32_bits(ib->gpu_addr) & 0xffffffe0); in sdma_v5_0_ring_emit_ib()
451 amdgpu_ring_write(ring, upper_32_bits(ib->gpu_addr)); in sdma_v5_0_ring_emit_ib()
452 amdgpu_ring_write(ring, ib->length_dw); in sdma_v5_0_ring_emit_ib()
1076 struct amdgpu_ib ib; in sdma_v5_0_ring_test_ib() local
1084 memset(&ib, 0, sizeof(ib)); in sdma_v5_0_ring_test_ib()
1096 AMDGPU_IB_POOL_DIRECT, &ib); in sdma_v5_0_ring_test_ib()
1102 ib.ptr[0] = SDMA_PKT_HEADER_OP(SDMA_OP_WRITE) | in sdma_v5_0_ring_test_ib()
1104 ib.ptr[1] = lower_32_bits(gpu_addr); in sdma_v5_0_ring_test_ib()
1105 ib.ptr[2] = upper_32_bits(gpu_addr); in sdma_v5_0_ring_test_ib()
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H A Dsdma_v5_2.c279 struct amdgpu_ib *ib, in sdma_v5_2_ring_emit_ib() argument
298 amdgpu_ring_write(ring, lower_32_bits(ib->gpu_addr) & 0xffffffe0); in sdma_v5_2_ring_emit_ib()
299 amdgpu_ring_write(ring, upper_32_bits(ib->gpu_addr)); in sdma_v5_2_ring_emit_ib()
300 amdgpu_ring_write(ring, ib->length_dw); in sdma_v5_2_ring_emit_ib()
976 struct amdgpu_ib ib; in sdma_v5_2_ring_test_ib() local
984 memset(&ib, 0, sizeof(ib)); in sdma_v5_2_ring_test_ib()
995 r = amdgpu_ib_get(adev, NULL, 256, AMDGPU_IB_POOL_DIRECT, &ib); in sdma_v5_2_ring_test_ib()
1001 ib.ptr[0] = SDMA_PKT_HEADER_OP(SDMA_OP_WRITE) | in sdma_v5_2_ring_test_ib()
1003 ib.ptr[1] = lower_32_bits(gpu_addr); in sdma_v5_2_ring_test_ib()
1004 ib.ptr[2] = upper_32_bits(gpu_addr); in sdma_v5_2_ring_test_ib()
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H A Dsdma_v4_4_2.c373 struct amdgpu_ib *ib, in sdma_v4_4_2_ring_emit_ib() argument
384 amdgpu_ring_write(ring, lower_32_bits(ib->gpu_addr) & 0xffffffe0); in sdma_v4_4_2_ring_emit_ib()
385 amdgpu_ring_write(ring, upper_32_bits(ib->gpu_addr)); in sdma_v4_4_2_ring_emit_ib()
386 amdgpu_ring_write(ring, ib->length_dw); in sdma_v4_4_2_ring_emit_ib()
1112 struct amdgpu_ib ib; in sdma_v4_4_2_ring_test_ib() local
1126 memset(&ib, 0, sizeof(ib)); in sdma_v4_4_2_ring_test_ib()
1128 AMDGPU_IB_POOL_DIRECT, &ib); in sdma_v4_4_2_ring_test_ib()
1132 ib.ptr[0] = SDMA_PKT_HEADER_OP(SDMA_OP_WRITE) | in sdma_v4_4_2_ring_test_ib()
1134 ib.ptr[1] = lower_32_bits(gpu_addr); in sdma_v4_4_2_ring_test_ib()
1135 ib.ptr[2] = upper_32_bits(gpu_addr); in sdma_v4_4_2_ring_test_ib()
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H A Damdgpu_ib.c66 struct amdgpu_ib *ib) in amdgpu_ib_get() argument
72 &ib->sa_bo, size); in amdgpu_ib_get()
78 ib->ptr = amdgpu_sa_bo_cpu_addr(ib->sa_bo); in amdgpu_ib_get()
80 ib->flags = AMDGPU_IB_FLAG_EMIT_MEM_SYNC; in amdgpu_ib_get()
83 ib->gpu_addr = amdgpu_sa_bo_gpu_addr(ib->sa_bo); in amdgpu_ib_get()
97 void amdgpu_ib_free(struct amdgpu_ib *ib, struct dma_fence *f) in amdgpu_ib_free() argument
99 amdgpu_sa_bo_free(&ib->sa_bo, f); in amdgpu_ib_free()
129 struct amdgpu_ib *ib = &ibs[0]; in amdgpu_ib_schedule() local
192 if ((ib->flags & AMDGPU_IB_FLAGS_SECURE) && in amdgpu_ib_schedule()
251 if ((ib->flags & AMDGPU_IB_FLAG_EMIT_MEM_SYNC) && ring->funcs->emit_mem_sync) in amdgpu_ib_schedule()
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H A Damdgpu_uvd.c102 struct amdgpu_ib *ib; member
589 lo = amdgpu_ib_get_value(ctx->ib, ctx->data0); in amdgpu_uvd_get_addr_from_ctx()
590 hi = amdgpu_ib_get_value(ctx->ib, ctx->data1); in amdgpu_uvd_get_addr_from_ctx()
621 cmd = amdgpu_ib_get_value(ctx->ib, ctx->idx) >> 1; in amdgpu_uvd_cs_pass1()
914 amdgpu_ib_set_value(ctx->ib, ctx->data0, lower_32_bits(start)); in amdgpu_uvd_cs_pass2()
915 amdgpu_ib_set_value(ctx->ib, ctx->data1, upper_32_bits(start)); in amdgpu_uvd_cs_pass2()
917 cmd = amdgpu_ib_get_value(ctx->ib, ctx->idx) >> 1; in amdgpu_uvd_cs_pass2()
984 if (ctx->idx >= ctx->ib->length_dw) { in amdgpu_uvd_cs_reg()
1026 for (ctx->idx = 0 ; ctx->idx < ctx->ib->length_dw; ) { in amdgpu_uvd_cs_packets()
1027 uint32_t cmd = amdgpu_ib_get_value(ctx->ib, ctx->idx); in amdgpu_uvd_cs_packets()
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/linux/drivers/gpu/drm/radeon/
H A Dradeon_ib.c61 struct radeon_ib *ib, struct radeon_vm *vm, in radeon_ib_get() argument
66 r = radeon_sa_bo_new(&rdev->ring_tmp_bo, &ib->sa_bo, size, 256); in radeon_ib_get()
72 radeon_sync_create(&ib->sync); in radeon_ib_get()
74 ib->ring = ring; in radeon_ib_get()
75 ib->fence = NULL; in radeon_ib_get()
76 ib->ptr = radeon_sa_bo_cpu_addr(ib->sa_bo); in radeon_ib_get()
77 ib->vm = vm; in radeon_ib_get()
82 ib->gpu_addr = drm_suballoc_soffset(ib->sa_bo) + RADEON_VA_IB_OFFSET; in radeon_ib_get()
84 ib->gpu_addr = radeon_sa_bo_gpu_addr(ib->sa_bo); in radeon_ib_get()
86 ib->is_const_ib = false; in radeon_ib_get()
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H A Dni_dma.c122 struct radeon_ib *ib) in cayman_dma_ring_ib_execute() argument
124 struct radeon_ring *ring = &rdev->ring[ib->ring]; in cayman_dma_ring_ib_execute()
125 unsigned vm_id = ib->vm ? ib->vm->ids[ib->ring].id : 0; in cayman_dma_ring_ib_execute()
144 radeon_ring_write(ring, (ib->gpu_addr & 0xFFFFFFE0)); in cayman_dma_ring_ib_execute()
145 radeon_ring_write(ring, (ib->length_dw << 12) | (upper_32_bits(ib->gpu_addr) & 0xFF)); in cayman_dma_ring_ib_execute()
315 struct radeon_ib *ib, in cayman_dma_vm_copy_pages() argument
326 ib->ptr[ib->length_dw++] = DMA_PACKET(DMA_PACKET_COPY, in cayman_dma_vm_copy_pages()
328 ib->ptr[ib->length_dw++] = lower_32_bits(pe); in cayman_dma_vm_copy_pages()
329 ib->ptr[ib->length_dw++] = lower_32_bits(src); in cayman_dma_vm_copy_pages()
330 ib->ptr[ib->length_dw++] = upper_32_bits(pe) & 0xff; in cayman_dma_vm_copy_pages()
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H A Dsi_dma.c69 struct radeon_ib *ib, in si_dma_vm_copy_pages() argument
78 ib->ptr[ib->length_dw++] = DMA_PACKET(DMA_PACKET_COPY, in si_dma_vm_copy_pages()
80 ib->ptr[ib->length_dw++] = lower_32_bits(pe); in si_dma_vm_copy_pages()
81 ib->ptr[ib->length_dw++] = lower_32_bits(src); in si_dma_vm_copy_pages()
82 ib->ptr[ib->length_dw++] = upper_32_bits(pe) & 0xff; in si_dma_vm_copy_pages()
83 ib->ptr[ib->length_dw++] = upper_32_bits(src) & 0xff; in si_dma_vm_copy_pages()
105 struct radeon_ib *ib, in si_dma_vm_write_pages() argument
119 ib->ptr[ib->length_dw++] = DMA_PACKET(DMA_PACKET_WRITE, 0, 0, 0, ndw); in si_dma_vm_write_pages()
120 ib->ptr[ib->length_dw++] = pe; in si_dma_vm_write_pages()
121 ib->ptr[ib->length_dw++] = upper_32_bits(pe) & 0xff; in si_dma_vm_write_pages()
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H A Dcik_sdma.c133 struct radeon_ib *ib) in cik_sdma_ring_ib_execute() argument
135 struct radeon_ring *ring = &rdev->ring[ib->ring]; in cik_sdma_ring_ib_execute()
136 u32 extra_bits = (ib->vm ? ib->vm->ids[ib->ring].id : 0) & 0xf; in cik_sdma_ring_ib_execute()
154 radeon_ring_write(ring, ib->gpu_addr & 0xffffffe0); /* base must be 32 byte aligned */ in cik_sdma_ring_ib_execute()
155 radeon_ring_write(ring, upper_32_bits(ib->gpu_addr)); in cik_sdma_ring_ib_execute()
156 radeon_ring_write(ring, ib->length_dw); in cik_sdma_ring_ib_execute()
703 struct radeon_ib ib; in cik_sdma_ib_test() local
720 r = radeon_ib_get(rdev, ring->idx, &ib, NULL, 256); in cik_sdma_ib_test()
726 ib.ptr[0] = SDMA_PACKET(SDMA_OPCODE_WRITE, SDMA_WRITE_SUB_OPCODE_LINEAR, 0); in cik_sdma_ib_test()
727 ib.ptr[1] = lower_32_bits(gpu_addr); in cik_sdma_ib_test()
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H A Devergreen_cs.c454 uint32_t *ib = p->ib.ptr; in evergreen_cs_track_validate_cb() local
476 ib[track->cb_color_slice_idx[id]] = slice; in evergreen_cs_track_validate_cb()
1101 u32 tmp, *ib; in evergreen_cs_handle_reg() local
1104 ib = p->ib.ptr; in evergreen_cs_handle_reg()
1152 ib[idx] += (u32)((reloc->gpu_offset >> 8) & 0xffffffff); in evergreen_cs_handle_reg()
1181 ib[idx] &= ~Z_ARRAY_MODE(0xf); in evergreen_cs_handle_reg()
1183 ib[idx] |= Z_ARRAY_MODE(evergreen_cs_get_aray_mode(reloc->tiling_flags)); in evergreen_cs_handle_reg()
1191 ib[idx] |= DB_NUM_BANKS(evergreen_cs_get_num_banks(track->nbanks)); in evergreen_cs_handle_reg()
1192 ib[idx] |= DB_TILE_SPLIT(tile_split) | in evergreen_cs_handle_reg()
1224 ib[idx] += (u32)((reloc->gpu_offset >> 8) & 0xffffffff); in evergreen_cs_handle_reg()
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H A Dradeon_vm.c358 struct radeon_ib *ib, in radeon_vm_set_pages() argument
367 radeon_asic_vm_copy_pages(rdev, ib, pe, src, count); in radeon_vm_set_pages()
370 radeon_asic_vm_write_pages(rdev, ib, pe, addr, in radeon_vm_set_pages()
374 radeon_asic_vm_set_pages(rdev, ib, pe, addr, in radeon_vm_set_pages()
389 struct radeon_ib ib; in radeon_vm_clear_bo() local
405 r = radeon_ib_get(rdev, R600_RING_TYPE_DMA_INDEX, &ib, NULL, 256); in radeon_vm_clear_bo()
409 ib.length_dw = 0; in radeon_vm_clear_bo()
411 radeon_vm_set_pages(rdev, &ib, addr, 0, entries, 0, 0); in radeon_vm_clear_bo()
412 radeon_asic_vm_pad_ib(rdev, &ib); in radeon_vm_clear_bo()
413 WARN_ON(ib.length_dw > 64); in radeon_vm_clear_bo()
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H A Dr600_cs.c356 volatile u32 *ib = p->ib.ptr; in r600_cs_track_validate_cb() local
468 ib[track->cb_color_size_idx[i]] = tmp; in r600_cs_track_validate_cb()
527 volatile u32 *ib = p->ib.ptr; in r600_cs_track_validate_db() local
567 ib[track->db_depth_size_idx] = S_028000_SLICE_TILE_MAX(tmp - 1) | (track->db_depth_size & 0x3FF); in r600_cs_track_validate_db()
837 volatile uint32_t *ib; in r600_cs_common_vline_parse() local
839 ib = p->ib.ptr; in r600_cs_common_vline_parse()
902 ib[h_idx + 2] = PACKET2(0); in r600_cs_common_vline_parse()
903 ib[h_idx + 3] = PACKET2(0); in r600_cs_common_vline_parse()
904 ib[h_idx + 4] = PACKET2(0); in r600_cs_common_vline_parse()
905 ib[h_idx + 5] = PACKET2(0); in r600_cs_common_vline_parse()
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H A Dr600_dma.c338 struct radeon_ib ib; in r600_dma_ib_test() local
352 r = radeon_ib_get(rdev, ring->idx, &ib, NULL, 256); in r600_dma_ib_test()
358 ib.ptr[0] = DMA_PACKET(DMA_PACKET_WRITE, 0, 0, 1); in r600_dma_ib_test()
359 ib.ptr[1] = lower_32_bits(gpu_addr); in r600_dma_ib_test()
360 ib.ptr[2] = upper_32_bits(gpu_addr) & 0xff; in r600_dma_ib_test()
361 ib.ptr[3] = 0xDEADBEEF; in r600_dma_ib_test()
362 ib.length_dw = 4; in r600_dma_ib_test()
364 r = radeon_ib_schedule(rdev, &ib, NULL, false); in r600_dma_ib_test()
366 radeon_ib_free(rdev, &ib); in r600_dma_ib_test()
370 r = radeon_fence_wait_timeout(ib.fence, false, usecs_to_jiffies( in r600_dma_ib_test()
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/linux/arch/s390/include/asm/
H A Didals.h135 struct idal_buffer *ib; in idal_buffer_alloc() local
140 ib = kmalloc_flex(*ib, data, nr_ptrs, GFP_DMA | GFP_KERNEL); in idal_buffer_alloc()
141 if (!ib) in idal_buffer_alloc()
143 ib->size = size; in idal_buffer_alloc()
144 ib->page_order = page_order; in idal_buffer_alloc()
147 ib->data[i] = dma64_add(ib->data[i - 1], IDA_BLOCK_SIZE); in idal_buffer_alloc()
153 ib->data[i] = virt_to_dma64(vaddr); in idal_buffer_alloc()
155 return ib; in idal_buffer_alloc()
159 vaddr = dma64_to_virt(ib->data[i]); in idal_buffer_alloc()
160 free_pages((unsigned long)vaddr, ib->page_order); in idal_buffer_alloc()
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/linux/drivers/net/ethernet/amd/
H A D7990.c100 t, ib->brx_ring[t].rmd1_hadr, ib->brx_ring[t].rmd0, \
101 ib->brx_ring[t].length, \
102 ib->brx_ring[t].mblength, ib->brx_ring[t].rmd1_bits); \
106 t, ib->btx_ring[t].tmd1_hadr, ib->btx_ring[t].tmd0, \
107 ib->btx_ring[t].length, \
108 ib->btx_ring[t].misc, ib->btx_ring[t].tmd1_bits); \
140 volatile struct lance_init_block *ib = lp->init_block; in lance_init_ring() local
150 ib->mode = LE_MO_PROM; /* normal, enable Tx & Rx */ in lance_init_ring()
163 ib->phys_addr[0] = dev->dev_addr[1]; in lance_init_ring()
164 ib->phys_addr[1] = dev->dev_addr[0]; in lance_init_ring()
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H A Dsunlance.c319 struct lance_init_block *ib = lp->init_block_mem; in lance_init_ring_dvma() local
332 ib->phys_addr [0] = dev->dev_addr [1]; in lance_init_ring_dvma()
333 ib->phys_addr [1] = dev->dev_addr [0]; in lance_init_ring_dvma()
334 ib->phys_addr [2] = dev->dev_addr [3]; in lance_init_ring_dvma()
335 ib->phys_addr [3] = dev->dev_addr [2]; in lance_init_ring_dvma()
336 ib->phys_addr [4] = dev->dev_addr [5]; in lance_init_ring_dvma()
337 ib->phys_addr [5] = dev->dev_addr [4]; in lance_init_ring_dvma()
342 ib->btx_ring [i].tmd0 = leptr; in lance_init_ring_dvma()
343 ib->btx_ring [i].tmd1_hadr = leptr >> 16; in lance_init_ring_dvma()
344 ib->btx_ring [i].tmd1_bits = 0; in lance_init_ring_dvma()
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/linux/fs/ntfs/
H A Dindex.c86 else if (ictx->ib) in ntfs_index_entry_mark_dirty()
100 static int ntfs_ib_write(struct ntfs_index_context *icx, struct index_block *ib) in ntfs_ib_write() argument
102 s64 ret, vcn = le64_to_cpu(ib->index_block_vcn); in ntfs_ib_write()
106 ret = pre_write_mst_fixup((struct ntfs_record *)ib, icx->block_size); in ntfs_ib_write()
112 (u8 *)ib, icx->sync_write); in ntfs_ib_write()
115 post_write_mst_fixup((struct ntfs_record *)ib); in ntfs_ib_write()
130 err = ntfs_ib_write(icx, icx->ib); in ntfs_icx_ib_write()
148 ret = ntfs_ib_write(icx, icx->ib); in ntfs_icx_ib_sync_write()
150 kvfree(icx->ib); in ntfs_icx_ib_sync_write()
151 icx->ib = NULL; in ntfs_icx_ib_sync_write()
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/linux/drivers/infiniband/hw/mlx4/
H A Dah.c48 ah->av.ib.port_pd = cpu_to_be32(to_mpd(ib_ah->pd)->pdn | in create_ib_ah()
50 ah->av.ib.g_slid = rdma_ah_get_path_bits(ah_attr); in create_ib_ah()
51 ah->av.ib.sl_tclass_flowlabel = in create_ib_ah()
56 ah->av.ib.g_slid |= 0x80; in create_ib_ah()
57 ah->av.ib.gid_index = grh->sgid_index; in create_ib_ah()
58 ah->av.ib.hop_limit = grh->hop_limit; in create_ib_ah()
59 ah->av.ib.sl_tclass_flowlabel |= in create_ib_ah()
62 memcpy(ah->av.ib.dgid, grh->dgid.raw, 16); in create_ib_ah()
65 ah->av.ib.dlid = cpu_to_be16(rdma_ah_get_dlid(ah_attr)); in create_ib_ah()
73 ah->av.ib.stat_rate = static_rate; in create_ib_ah()
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/linux/drivers/s390/char/
H A Dfs3270.c242 struct idal_buffer *ib; in fs3270_read() local
250 ib = idal_buffer_alloc(count, 0); in fs3270_read()
251 if (IS_ERR(ib)) in fs3270_read()
258 raw3270_request_set_idal(rq, ib); in fs3270_read()
265 if (idal_buffer_to_user(ib, data, count) != 0) in fs3270_read()
275 idal_buffer_free(ib); in fs3270_read()
287 struct idal_buffer *ib; in fs3270_write() local
294 ib = idal_buffer_alloc(count, 0); in fs3270_write()
295 if (IS_ERR(ib)) in fs3270_write()
299 if (idal_buffer_from_user(ib, data, count) == 0) { in fs3270_write()
[all …]
/linux/fs/smb/server/
H A Dksmbd_work.c130 static inline void __ksmbd_iov_pin(struct ksmbd_work *work, void *ib, in __ksmbd_iov_pin() argument
133 work->iov[++work->iov_idx].iov_base = ib; in __ksmbd_iov_pin()
138 static int __ksmbd_iov_pin_rsp(struct ksmbd_work *work, void *ib, int len, in __ksmbd_iov_pin_rsp() argument
164 __ksmbd_iov_pin(work, ib, len); in __ksmbd_iov_pin_rsp()
178 int ksmbd_iov_pin_rsp(struct ksmbd_work *work, void *ib, int len) in ksmbd_iov_pin_rsp() argument
180 return __ksmbd_iov_pin_rsp(work, ib, len, NULL, 0); in ksmbd_iov_pin_rsp()
183 int ksmbd_iov_pin_rsp_read(struct ksmbd_work *work, void *ib, int len, in ksmbd_iov_pin_rsp_read() argument
186 return __ksmbd_iov_pin_rsp(work, ib, len, aux_buf, aux_size); in ksmbd_iov_pin_rsp_read()
/linux/drivers/net/ethernet/brocade/bna/
H A Dbna_hw_defs.h236 struct bna_ib *ib = _ib; \
237 if ((ib->intr_type == BNA_INTR_T_INTX)) { \
239 intx_mask &= ~(ib->intr_vector); \
242 bna_ib_coalescing_timer_set(&ib->door_bell, \
243 ib->coalescing_timeo); \
245 bna_ib_ack(&ib->door_bell, 0); \
251 struct bna_ib *ib = _ib; \
253 ib->door_bell.doorbell_addr); \
254 if (ib->intr_type == BNA_INTR_T_INTX) { \
256 intx_mask |= ib->intr_vector; \

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