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Searched refs:hwseq (Results 1 – 16 of 16) sorted by relevance

/linux/drivers/gpu/drm/amd/display/dc/hwss/dcn201/
H A Ddcn201_hwseq.c85 static bool gpu_addr_to_uma(struct dce_hwseq *hwseq, in gpu_addr_to_uma() argument
90 if (hwseq->fb_base.quad_part <= addr->quad_part && in gpu_addr_to_uma()
91 addr->quad_part < hwseq->fb_top.quad_part) { in gpu_addr_to_uma()
92 addr->quad_part -= hwseq->fb_base.quad_part; in gpu_addr_to_uma()
93 addr->quad_part += hwseq->fb_offset.quad_part; in gpu_addr_to_uma()
95 } else if (hwseq->fb_offset.quad_part <= addr->quad_part && in gpu_addr_to_uma()
96 addr->quad_part <= hwseq->uma_top.quad_part) { in gpu_addr_to_uma()
107 static void plane_address_in_gpu_space_to_uma(struct dce_hwseq *hwseq, in plane_address_in_gpu_space_to_uma() argument
112 gpu_addr_to_uma(hwseq, &addr->grph.addr); in plane_address_in_gpu_space_to_uma()
113 gpu_addr_to_uma(hwseq, &addr->grph.meta_addr); in plane_address_in_gpu_space_to_uma()
[all …]
/linux/drivers/gpu/drm/amd/display/dc/hwss/dcn303/
H A Ddcn303_init.c36 dc->hwseq->funcs.dpp_pg_control = dcn303_dpp_pg_control; in dcn303_hw_sequencer_construct()
37 dc->hwseq->funcs.hubp_pg_control = dcn303_hubp_pg_control; in dcn303_hw_sequencer_construct()
38 dc->hwseq->funcs.dsc_pg_control = dcn303_dsc_pg_control; in dcn303_hw_sequencer_construct()
39 dc->hwseq->funcs.enable_power_gating_plane = dcn303_enable_power_gating_plane; in dcn303_hw_sequencer_construct()
/linux/drivers/gpu/drm/amd/display/dc/hwss/dcn302/
H A Ddcn302_init.c38 dc->hwseq->funcs.dpp_pg_control = dcn302_dpp_pg_control; in dcn302_hw_sequencer_construct()
39 dc->hwseq->funcs.hubp_pg_control = dcn302_hubp_pg_control; in dcn302_hw_sequencer_construct()
40 dc->hwseq->funcs.dsc_pg_control = dcn302_dsc_pg_control; in dcn302_hw_sequencer_construct()
/linux/drivers/gpu/drm/amd/display/dc/core/
H A Ddc_vm_helper.c43 num_vmids = dc->hwss.init_sys_ctx(dc->hwseq, dc, pa_config); in dc_setup_system_context()
59 dc->hwss.init_vm_ctx(dc->hwseq, dc, va_config, vmid); in dc_setup_vm_context()
H A Ddc_hw_sequencer.c741 struct dce_hwseq *hws = dc->hwseq; in hwss_build_fast_sequence()
946 struct dce_hwseq *hws = dc->hwseq; in hwss_execute_sequence()
2087 struct dce_hwseq *hws = dc->hwseq; in hwss_wait_for_all_blank_complete()
2618 struct dce_hwseq *hwseq = dc->hwseq; in hwss_update_force_pstate() local
2620 if (hwseq->funcs.update_force_pstate) in hwss_update_force_pstate()
2621 hwseq->funcs.update_force_pstate(dc, context); in hwss_update_force_pstate()
2933 struct dce_hwseq *hws = dc->hwseq; in hwss_dc_ip_request_cntl()
3023 struct dce_hwseq *hws = dc->hwseq; in hwss_mpc_update_mpcc()
H A Ddc.c1382 if (dc->hwseq->funcs.blank_pixel_data) in disable_dangling_plane()
1383 dc->hwseq->funcs.blank_pixel_data(dc, pipe, true); in disable_dangling_plane()
2160 if (dc->hwseq->funcs.wait_for_pipe_update_if_needed) { in dc_commit_state_no_check()
2166 dc->hwseq->funcs.wait_for_pipe_update_if_needed(dc, pipe, false); in dc_commit_state_no_check()
2243 if (dc->hwseq->funcs.set_wait_for_update_needed_for_pipe) { in dc_commit_state_no_check()
2246 dc->hwseq->funcs.set_wait_for_update_needed_for_pipe(dc, pipe); in dc_commit_state_no_check()
4200 if (dc->hwseq->funcs.wait_for_pipe_update_if_needed) in commit_planes_for_stream()
4201 …dc->hwseq->funcs.wait_for_pipe_update_if_needed(dc, top_pipe_to_program, update_type < UPDATE_TYPE… in commit_planes_for_stream()
4353 if (dc->hwseq->funcs.set_wait_for_update_needed_for_pipe && update_type == UPDATE_TYPE_FULL) { in commit_planes_for_stream()
4357 dc->hwseq->funcs.set_wait_for_update_needed_for_pipe(dc, pipe_ctx); in commit_planes_for_stream()
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H A Ddc_resource.c403 kfree(dc->hwseq); in dc_destroy_resource_pool()
538 dc->hwseq = create_funcs->create_hwseq(ctx); in resource_construct()
/linux/drivers/gpu/drm/amd/display/dc/hwss/dcn401/
H A Ddcn401_hwseq.c138 struct dce_hwseq *hws = dc->hwseq; in dcn401_init_hw()
226 hws->funcs.enable_power_gating_plane(dc->hwseq, true); in dcn401_init_hw()
757 struct dce_hwseq *hws = dc->hwseq; in dcn401_enable_stream_timing()
816 if (dc->hwseq->funcs.PLAT_58856_wa && (!dc_is_dp_signal(stream->signal))) in dcn401_enable_stream_timing()
817 dc->hwseq->funcs.PLAT_58856_wa(context, pipe_ctx); in dcn401_enable_stream_timing()
1602 dc->hwseq->funcs.blank_pixel_data(dc, otg_master, true); in dcn401_update_odm()
1736 if (dc->hwseq->funcs.blank_pixel_data_sequence) in dcn401_update_odm_sequence()
1737 dc->hwseq->funcs.blank_pixel_data_sequence( in dcn401_update_odm_sequence()
1748 struct dce_hwseq *hws = link->dc->hwseq; in dcn401_unblank_stream()
2036 struct dce_hwseq *hws = dc->hwseq; in dcn401_reset_hw_ctx_wrap()
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/linux/drivers/gpu/drm/amd/display/dc/hwss/dcn20/
H A Ddcn20_hwseq.c409 struct dce_hwseq *hws = dc->hwseq; in dcn20_init_blank()
712 struct dce_hwseq *hws = dc->hwseq; in dcn20_plane_atomic_disable()
836 struct dce_hwseq *hws = dc->hwseq; in dcn20_enable_stream_timing()
919 if (dc->hwseq->funcs.PLAT_58856_wa && (!dc_is_dp_signal(stream->signal))) in dcn20_enable_stream_timing()
920 dc->hwseq->funcs.PLAT_58856_wa(context, pipe_ctx); in dcn20_enable_stream_timing()
1119 struct dce_hwseq *hws = dc->hwseq; in dcn20_set_input_transfer_func()
1318 dcn20_power_on_plane_resources(dc->hwseq, pipe_ctx); in dcn20_enable_plane()
1483 if (dc->hwseq->funcs.perform_3dlut_wa_unlock) in dcn20_pipe_control_lock()
1484 dc->hwseq->funcs.perform_3dlut_wa_unlock(pipe); in dcn20_pipe_control_lock()
1684 struct dce_hwseq *hws = dc->hwseq; in dcn20_update_dchubp_dpp()
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/linux/drivers/gpu/drm/amd/display/dc/hwss/dce112/
H A Ddce112_hwseq.c158 dc->hwseq->funcs.enable_display_power_gating = dce112_enable_display_power_gating; in dce112_hw_sequencer_construct()
/linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dce120/
H A Ddce120_clk_mgr.c149 if (dce121_xgmi_enabled(ctx->dc->hwseq)) in dce121_clk_mgr_construct()
/linux/drivers/gpu/drm/amd/display/dc/hwss/dcn314/
H A Ddcn314_init.c163 dc->hwseq->funcs = dcn314_private_funcs; in dcn314_hw_sequencer_construct()
/linux/drivers/gpu/drm/amd/display/dc/hwss/dcn351/
H A Ddcn351_init.c170 dc->hwseq->funcs = dcn351_private_funcs; in dcn351_hw_sequencer_construct()
/linux/drivers/gpu/drm/amd/display/dc/hwss/dce/
H A Ddce_hwseq.c53 struct dce_hwseq *hws = dc->hwseq; in dce_pipe_control_lock()
/linux/drivers/gpu/drm/amd/display/dc/link/accessories/
H A Dlink_dp_cts.c138 link->dc->hwss.setup_hpo_hw_control(link->dc->hwseq, is_hpo_acquired); in dp_retrain_link_dp_test()
/linux/drivers/gpu/drm/amd/display/dc/
H A Ddc.h1759 struct dce_hwseq *hwseq; member