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Searched refs:hw_ste_p (Results 1 – 5 of 5) sorted by relevance

/linux/drivers/net/ethernet/mellanox/mlx5/core/steering/sws/
H A Ddr_ste_v1.h142 bool dr_ste_v1_is_miss_addr_set(u8 *hw_ste_p);
143 void dr_ste_v1_set_miss_addr(u8 *hw_ste_p, u64 miss_addr);
144 u64 dr_ste_v1_get_miss_addr(u8 *hw_ste_p);
145 void dr_ste_v1_set_byte_mask(u8 *hw_ste_p, u16 byte_mask);
146 u16 dr_ste_v1_get_byte_mask(u8 *hw_ste_p);
147 void dr_ste_v1_set_next_lu_type(u8 *hw_ste_p, u16 lu_type);
148 u16 dr_ste_v1_get_next_lu_type(u8 *hw_ste_p);
149 void dr_ste_v1_set_hit_addr(u8 *hw_ste_p, u64 icm_addr, u32 ht_size);
150 void dr_ste_v1_init(u8 *hw_ste_p, u16 lu_type, bool is_rx, u16 gvmi);
151 void dr_ste_v1_prepare_for_postsend(u8 *hw_ste_p, u32 ste_size);
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H A Ddr_ste.h150 void (*ste_init)(u8 *hw_ste_p, u16 lu_type,
152 void (*set_next_lu_type)(u8 *hw_ste_p, u16 lu_type);
153 u16 (*get_next_lu_type)(u8 *hw_ste_p);
154 bool (*is_miss_addr_set)(u8 *hw_ste_p);
155 void (*set_miss_addr)(u8 *hw_ste_p, u64 miss_addr);
156 u64 (*get_miss_addr)(u8 *hw_ste_p);
157 void (*set_hit_addr)(u8 *hw_ste_p, u64 icm_addr, u32 ht_size);
158 void (*set_byte_mask)(u8 *hw_ste_p, u16 byte_mask);
159 u16 (*get_byte_mask)(u8 *hw_ste_p);
203 void (*set_encap)(u8 *hw_ste_p, u8 *d_action,
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H A Ddr_ste_v3.c7 static void dr_ste_v3_set_encap(u8 *hw_ste_p, u8 *d_action, in dr_ste_v3_set_encap() argument
17 dr_ste_v1_set_reparse(hw_ste_p); in dr_ste_v3_set_encap()
32 static void dr_ste_v3_set_pop_vlan(u8 *hw_ste_p, u8 *s_action, in dr_ste_v3_set_pop_vlan() argument
43 dr_ste_v1_set_reparse(hw_ste_p); in dr_ste_v3_set_pop_vlan()
46 static void dr_ste_v3_set_encap_l3(u8 *hw_ste_p, in dr_ste_v3_set_encap_l3() argument
67 dr_ste_v1_set_reparse(hw_ste_p); in dr_ste_v3_set_encap_l3()
70 static void dr_ste_v3_set_rx_decap(u8 *hw_ste_p, u8 *s_action) in dr_ste_v3_set_rx_decap() argument
79 dr_ste_v1_set_reparse(hw_ste_p); in dr_ste_v3_set_rx_decap()
82 static void dr_ste_v3_set_insert_hdr(u8 *hw_ste_p, u8 *d_action, in dr_ste_v3_set_insert_hdr() argument
102 dr_ste_v1_set_reparse(hw_ste_p); in dr_ste_v3_set_insert_hdr()
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H A Ddr_ste_v1.c136 static void dr_ste_v1_set_entry_type(u8 *hw_ste_p, u8 entry_type) in dr_ste_v1_set_entry_type() argument
138 MLX5_SET(ste_match_bwc_v1, hw_ste_p, entry_format, entry_type); in dr_ste_v1_set_entry_type()
141 bool dr_ste_v1_is_miss_addr_set(u8 *hw_ste_p) in dr_ste_v1_is_miss_addr_set() argument
143 u8 entry_type = MLX5_GET(ste_match_bwc_v1, hw_ste_p, entry_format); in dr_ste_v1_is_miss_addr_set()
151 void dr_ste_v1_set_miss_addr(u8 *hw_ste_p, u64 miss_addr) in dr_ste_v1_set_miss_addr() argument
155 MLX5_SET(ste_match_bwc_v1, hw_ste_p, miss_address_39_32, index >> 26); in dr_ste_v1_set_miss_addr()
156 MLX5_SET(ste_match_bwc_v1, hw_ste_p, miss_address_31_6, index); in dr_ste_v1_set_miss_addr()
159 u64 dr_ste_v1_get_miss_addr(u8 *hw_ste_p) in dr_ste_v1_get_miss_addr() argument
162 ((u64)MLX5_GET(ste_match_bwc_v1, hw_ste_p, miss_address_31_6) | in dr_ste_v1_get_miss_addr()
163 ((u64)MLX5_GET(ste_match_bwc_v1, hw_ste_p, miss_address_39_32)) << 26); in dr_ste_v1_get_miss_addr()
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H A Ddr_types.h248 u32 mlx5dr_ste_calc_hash_index(u8 *hw_ste_p, struct mlx5dr_ste_htbl *htbl);
249 bool mlx5dr_ste_is_miss_addr_set(struct mlx5dr_ste_ctx *ste_ctx, u8 *hw_ste_p);
257 void mlx5dr_ste_set_bit_mask(u8 *hw_ste_p, u8 *bit_mask);
1397 u8 *hw_ste_p, u32 ste_size);