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Searched refs:hw_ps (Results 1 – 12 of 12) sorted by relevance

/linux/drivers/media/platform/rockchip/rkvdec/
H A Drkvdec-vdpu383-hevc.c139 struct rkvdec_hevc_sps_pps *hw_ps;
156 hw_ps = &priv_tbl->param_set;
157 memset(hw_ps, 0, sizeof(*hw_ps));
160 rkvdec_set_bw_field(hw_ps->info, VIDEO_PARAMETER_SET_ID, sps->video_parameter_set_id);
161 rkvdec_set_bw_field(hw_ps->info, SEQ_PARAMETER_SET_ID, sps->seq_parameter_set_id);
162 rkvdec_set_bw_field(hw_ps->info, CHROMA_FORMAT_IDC, sps->chroma_format_idc);
168 rkvdec_set_bw_field(hw_ps->info, PIC_WIDTH_IN_LUMA_SAMPLES, width);
169 rkvdec_set_bw_field(hw_ps->info, PIC_HEIGHT_IN_LUMA_SAMPLES, height);
170 rkvdec_set_bw_field(hw_ps
174 set_column_row(struct rkvdec_hevc_sps_pps * hw_ps,u16 * column,u16 * row) set_column_row() argument
200 set_pps_ref_pic_poc(struct rkvdec_hevc_sps_pps * hw_ps,const struct v4l2_hevc_dpb_entry * dpb) set_pps_ref_pic_poc() argument
227 struct rkvdec_hevc_sps_pps *hw_ps; assemble_hw_pps() local
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H A Drkvdec-vdpu381-hevc.c131 struct rkvdec_sps_pps_packet *hw_ps; in assemble_hw_pps() local
148 hw_ps = &priv_tbl->param_set[pps->pic_parameter_set_id]; in assemble_hw_pps()
149 memset(hw_ps, 0, sizeof(*hw_ps)); in assemble_hw_pps()
152 hw_ps->sps.video_parameters_set_id = sps->video_parameter_set_id; in assemble_hw_pps()
153 hw_ps->sps.seq_parameters_set_id_sps = sps->seq_parameter_set_id; in assemble_hw_pps()
154 hw_ps->sps.chroma_format_idc = sps->chroma_format_idc; in assemble_hw_pps()
159 hw_ps->sps.width = width; in assemble_hw_pps()
160 hw_ps->sps.height = height; in assemble_hw_pps()
161 hw_ps->sps.bit_depth_luma = sps->bit_depth_luma_minus8 + 8; in assemble_hw_pps()
162 hw_ps->sps.bit_depth_chroma = sps->bit_depth_chroma_minus8 + 8; in assemble_hw_pps()
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H A Drkvdec-vdpu381-h264.c95 struct rkvdec_sps_pps *hw_ps; in assemble_hw_pps() local
106 hw_ps = &priv_tbl->param_set[pps->pic_parameter_set_id]; in assemble_hw_pps()
107 memset(hw_ps, 0, sizeof(*hw_ps)); in assemble_hw_pps()
110 hw_ps->sps.seq_parameter_set_id = sps->seq_parameter_set_id; in assemble_hw_pps()
111 hw_ps->sps.profile_idc = sps->profile_idc; in assemble_hw_pps()
112 hw_ps->sps.constraint_set3_flag = !!(sps->constraint_set_flags & (1 << 3)); in assemble_hw_pps()
113 hw_ps->sps.chroma_format_idc = sps->chroma_format_idc; in assemble_hw_pps()
114 hw_ps->sps.bit_depth_luma = sps->bit_depth_luma_minus8; in assemble_hw_pps()
115 hw_ps->sps.bit_depth_chroma = sps->bit_depth_chroma_minus8; in assemble_hw_pps()
116 hw_ps->sps.qpprime_y_zero_transform_bypass_flag = in assemble_hw_pps()
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H A Drkvdec-vdpu383-h264.c101 struct rkvdec_sps_pps *hw_ps;
111 hw_ps = &priv_tbl->param_set[pps->pic_parameter_set_id];
112 memset(hw_ps, 0, sizeof(*hw_ps));
115 rkvdec_set_bw_field(hw_ps->info, SEQ_PARAMETER_SET_ID, sps->seq_parameter_set_id);
116 rkvdec_set_bw_field(hw_ps->info, PROFILE_IDC, sps->profile_idc);
117 rkvdec_set_bw_field(hw_ps->info, CONSTRAINT_SET3_FLAG,
119 rkvdec_set_bw_field(hw_ps->info, CHROMA_FORMAT_IDC, sps->chroma_format_idc);
120 rkvdec_set_bw_field(hw_ps->info, BIT_DEPTH_LUMA, sps->bit_depth_luma_minus8);
121 rkvdec_set_bw_field(hw_ps
203 struct rkvdec_sps_pps *hw_ps; assemble_hw_pps() local
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H A Drkvdec-hevc.c126 struct rkvdec_sps_pps_packet *hw_ps; in set_ps_field()
138 hw_ps = &priv_tbl->param_set[pps->pic_parameter_set_id]; in set_ps_field()
139 memset(hw_ps, 0, sizeof(*hw_ps));
141 #define WRITE_PPS(value, field) rkvdec_set_bw_field(hw_ps->info, field, value) in assemble_hw_pps()
299 struct rkvdec_rps_packet *hw_ps;
303 #define WRITE_RPS(value, field) rkvdec_set_bw_field(hw_ps->info, field, value)
334 hw_ps = &priv_tbl->rps[j]; in assemble_sw_rps()
335 memset(hw_ps, 0, sizeof(*hw_ps)); in assemble_sw_rps()
147 struct rkvdec_sps_pps_packet *hw_ps; assemble_hw_pps() local
320 struct rkvdec_rps_packet *hw_ps; assemble_sw_rps() local
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H A Drkvdec-h264.c96 struct rkvdec_sps_pps_packet *hw_ps; in set_ps_field()
107 hw_ps = &priv_tbl->param_set[pps->pic_parameter_set_id];
108 memset(hw_ps, 0, sizeof(*hw_ps)); in assemble_hw_pps()
110 #define WRITE_PPS(value, field) rkvdec_set_bw_field(hw_ps->info, field, value) in assemble_hw_pps()
117 struct rkvdec_sps_pps_packet *hw_ps; assemble_hw_pps() local
/linux/drivers/gpu/drm/amd/pm/powerplay/hwmgr/
H A Dsmu10_hwmgr.c84 static struct smu10_power_state *cast_smu10_ps(struct pp_hw_power_state *hw_ps) in cast_smu10_ps() argument
86 if (SMU10_Magic != hw_ps->magic) in cast_smu10_ps()
89 return (struct smu10_power_state *)hw_ps; in cast_smu10_ps()
93 const struct pp_hw_power_state *hw_ps) in cast_const_smu10_ps() argument
95 if (SMU10_Magic != hw_ps->magic) in cast_const_smu10_ps()
98 return (struct smu10_power_state *)hw_ps; in cast_const_smu10_ps()
843 struct pp_hw_power_state *hw_ps) in smu10_dpm_force_dpm_level()
850 struct pp_hw_power_state *hw_ps,
854 struct smu10_power_state *smu10_ps = cast_smu10_ps(hw_ps); in smu10_dpm_get_mclk()
883 smu10_dpm_patch_boot_state(struct pp_hwmgr * hwmgr,struct pp_hw_power_state * hw_ps) smu10_dpm_patch_boot_state() argument
890 smu10_dpm_get_pp_table_entry_callback(struct pp_hwmgr * hwmgr,struct pp_hw_power_state * hw_ps,unsigned int index,const void * clock_info) smu10_dpm_get_pp_table_entry_callback() argument
H A Dprocesspptables.h35 struct pp_hw_power_state *hw_ps,
H A Dsmu8_hwmgr.c51 static struct smu8_power_state *cast_smu8_power_state(struct pp_hw_power_state *hw_ps) in cast_smu8_power_state() argument
53 if (smu8_magic != hw_ps->magic) in cast_smu8_power_state()
56 return (struct smu8_power_state *)hw_ps; in cast_smu8_power_state()
60 const struct pp_hw_power_state *hw_ps) in cast_const_smu8_power_state() argument
62 if (smu8_magic != hw_ps->magic) in cast_const_smu8_power_state()
65 return (struct smu8_power_state *)hw_ps; in cast_const_smu8_power_state()
1330 struct pp_hw_power_state *hw_ps) in smu8_dpm_powerdown_vce()
1333 struct smu8_power_state *smu8_ps = cast_smu8_power_state(hw_ps); in smu8_dpm_powerup_vce()
1345 struct pp_hw_power_state *hw_ps, in smu8_dpm_get_mclk()
1349 struct smu8_power_state *smu8_ps = cast_smu8_power_state(hw_ps); in smu8_dpm_get_sclk()
1371 smu8_dpm_patch_boot_state(struct pp_hwmgr * hwmgr,struct pp_hw_power_state * hw_ps) smu8_dpm_patch_boot_state() argument
1386 smu8_dpm_get_pp_table_entry_callback(struct pp_hwmgr * hwmgr,struct pp_hw_power_state * hw_ps,unsigned int index,const void * clock_info) smu8_dpm_get_pp_table_entry_callback() argument
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H A Dsmu7_hwmgr.c178 struct pp_hw_power_state *hw_ps) in cast_phw_smu7_power_state() argument
180 PP_ASSERT_WITH_CODE((PhwVIslands_Magic == hw_ps->magic), in cast_phw_smu7_power_state()
184 return (struct smu7_power_state *)hw_ps; in cast_phw_smu7_power_state()
188 const struct pp_hw_power_state *hw_ps) in cast_const_phw_smu7_power_state() argument
190 PP_ASSERT_WITH_CODE((PhwVIslands_Magic == hw_ps->magic), in cast_const_phw_smu7_power_state()
194 return (const struct smu7_power_state *)hw_ps; in cast_const_phw_smu7_power_state()
3624 struct pp_hw_power_state *hw_ps) in smu7_dpm_patch_boot_state() argument
3627 struct smu7_power_state *ps = (struct smu7_power_state *)hw_ps; in smu7_dpm_patch_boot_state()
H A Dvega10_hwmgr.c96 struct pp_hw_power_state *hw_ps) in cast_phw_vega10_power_state() argument
98 PP_ASSERT_WITH_CODE((PhwVega10_Magic == hw_ps->magic), in cast_phw_vega10_power_state()
102 return (struct vega10_power_state *)hw_ps; in cast_phw_vega10_power_state()
106 const struct pp_hw_power_state *hw_ps) in cast_const_phw_vega10_power_state() argument
108 PP_ASSERT_WITH_CODE((PhwVega10_Magic == hw_ps->magic), in cast_const_phw_vega10_power_state()
112 return (const struct vega10_power_state *)hw_ps; in cast_const_phw_vega10_power_state()
3267 struct pp_hw_power_state *hw_ps) in vega10_get_pp_table_entry()
3270 vega10_patch_boot_state(struct pp_hwmgr * hwmgr,struct pp_hw_power_state * hw_ps) vega10_patch_boot_state() argument
H A Dvega12_hwmgr.c1115 struct pp_hw_power_state *hw_ps) in vega12_patch_boot_state() argument