| /linux/drivers/media/platform/rockchip/rkvdec/ |
| H A D | rkvdec-vdpu383-hevc.c | 174 static void set_column_row(struct rkvdec_hevc_sps_pps *hw_ps, u16 *column, u16 *row) in set_column_row() argument
176 hw_ps->column_width0 = column[0] | (column[1] << 12); in set_column_row()
177 hw_ps->row_height0 = row[0] | (row[1] << 12); in set_column_row()
178 hw_ps->column_width1 = column[2] | (column[3] << 12); in set_column_row()
179 hw_ps->row_height1 = row[2] | (row[3] << 12); in set_column_row()
180 hw_ps->column_width2 = column[4] | (column[5] << 12); in set_column_row()
181 hw_ps->row_height2 = row[4] | (row[5] << 12); in set_column_row()
182 hw_ps->column_width3 = column[6] | (column[7] << 12); in set_column_row()
183 hw_ps->row_height3 = row[6] | (row[7] << 12); in set_column_row()
184 hw_ps->column_width4 = column[8] | (column[9] << 12); in set_column_row()
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| H A D | rkvdec-vdpu381-hevc.c | 131 struct rkvdec_sps_pps_packet *hw_ps; in assemble_hw_pps() local
148 hw_ps = &priv_tbl->param_set[pps->pic_parameter_set_id]; in assemble_hw_pps()
149 memset(hw_ps, 0, sizeof(*hw_ps)); in assemble_hw_pps()
152 hw_ps->sps.video_parameters_set_id = sps->video_parameter_set_id; in assemble_hw_pps()
153 hw_ps->sps.seq_parameters_set_id_sps = sps->seq_parameter_set_id; in assemble_hw_pps()
154 hw_ps->sps.chroma_format_idc = sps->chroma_format_idc; in assemble_hw_pps()
159 hw_ps->sps.width = width; in assemble_hw_pps()
160 hw_ps->sps.height = height; in assemble_hw_pps()
161 hw_ps->sps.bit_depth_luma = sps->bit_depth_luma_minus8 + 8; in assemble_hw_pps()
162 hw_ps->sps.bit_depth_chroma = sps->bit_depth_chroma_minus8 + 8; in assemble_hw_pps()
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| H A D | rkvdec-vdpu381-h264.c | 95 struct rkvdec_sps_pps *hw_ps; in assemble_hw_pps() local
106 hw_ps = &priv_tbl->param_set[pps->pic_parameter_set_id]; in assemble_hw_pps()
107 memset(hw_ps, 0, sizeof(*hw_ps)); in assemble_hw_pps()
110 hw_ps->sps.seq_parameter_set_id = sps->seq_parameter_set_id; in assemble_hw_pps()
111 hw_ps->sps.profile_idc = sps->profile_idc; in assemble_hw_pps()
112 hw_ps->sps.constraint_set3_flag = !!(sps->constraint_set_flags & (1 << 3)); in assemble_hw_pps()
113 hw_ps->sps.chroma_format_idc = sps->chroma_format_idc; in assemble_hw_pps()
114 hw_ps->sps.bit_depth_luma = sps->bit_depth_luma_minus8; in assemble_hw_pps()
115 hw_ps->sps.bit_depth_chroma = sps->bit_depth_chroma_minus8; in assemble_hw_pps()
116 hw_ps->sps.qpprime_y_zero_transform_bypass_flag = in assemble_hw_pps()
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| H A D | rkvdec-vdpu383-h264.c | 203 struct rkvdec_sps_pps *hw_ps; in assemble_hw_pps() local
212 hw_ps = &priv_tbl->param_set[pps->pic_parameter_set_id]; in assemble_hw_pps()
213 memset(hw_ps, 0, sizeof(*hw_ps)); in assemble_hw_pps()
216 hw_ps->sps.seq_parameter_set_id = sps->seq_parameter_set_id; in assemble_hw_pps()
217 hw_ps->sps.profile_idc = sps->profile_idc; in assemble_hw_pps()
218 hw_ps->sps.constraint_set3_flag = !!(sps->constraint_set_flags & (1 << 3)); in assemble_hw_pps()
219 hw_ps->sps.chroma_format_idc = sps->chroma_format_idc; in assemble_hw_pps()
220 hw_ps->sps.bit_depth_luma = sps->bit_depth_luma_minus8; in assemble_hw_pps()
221 hw_ps->sps.bit_depth_chroma = sps->bit_depth_chroma_minus8; in assemble_hw_pps()
222 hw_ps->sps.qpprime_y_zero_transform_bypass_flag = in assemble_hw_pps()
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| H A D | rkvdec-hevc.c | 147 struct rkvdec_sps_pps_packet *hw_ps; in assemble_hw_pps() local
159 hw_ps = &priv_tbl->param_set[pps->pic_parameter_set_id]; in assemble_hw_pps()
160 memset(hw_ps, 0, sizeof(*hw_ps)); in assemble_hw_pps()
162 #define WRITE_PPS(value, field) set_ps_field(hw_ps->info, field, value) in assemble_hw_pps()
320 struct rkvdec_rps_packet *hw_ps; in assemble_sw_rps() local
324 #define WRITE_RPS(value, field) set_ps_field(hw_ps->info, field, value) in assemble_sw_rps()
355 hw_ps = &priv_tbl->rps[j]; in assemble_sw_rps()
356 memset(hw_ps, 0, sizeof(*hw_ps)); in assemble_sw_rps()
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| H A D | rkvdec-h264.c | 117 struct rkvdec_sps_pps_packet *hw_ps; in assemble_hw_pps() local
128 hw_ps = &priv_tbl->param_set[pps->pic_parameter_set_id]; in assemble_hw_pps()
129 memset(hw_ps, 0, sizeof(*hw_ps)); in assemble_hw_pps()
131 #define WRITE_PPS(value, field) set_ps_field(hw_ps->info, field, value) in assemble_hw_pps()
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| /linux/drivers/gpu/drm/amd/pm/powerplay/hwmgr/ |
| H A D | smu10_hwmgr.c | 84 static struct smu10_power_state *cast_smu10_ps(struct pp_hw_power_state *hw_ps) in cast_smu10_ps() argument
86 if (SMU10_Magic != hw_ps->magic) in cast_smu10_ps()
89 return (struct smu10_power_state *)hw_ps; in cast_smu10_ps()
93 const struct pp_hw_power_state *hw_ps) in cast_const_smu10_ps() argument
95 if (SMU10_Magic != hw_ps->magic) in cast_const_smu10_ps()
98 return (struct smu10_power_state *)hw_ps; in cast_const_smu10_ps()
883 struct pp_hw_power_state *hw_ps) in smu10_dpm_patch_boot_state() argument
890 struct pp_hw_power_state *hw_ps, in smu10_dpm_get_pp_table_entry_callback() argument
894 struct smu10_power_state *smu10_ps = cast_smu10_ps(hw_ps); in smu10_dpm_get_pp_table_entry_callback()
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| H A D | processpptables.h | 35 struct pp_hw_power_state *hw_ps,
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| H A D | smu8_hwmgr.c | 51 static struct smu8_power_state *cast_smu8_power_state(struct pp_hw_power_state *hw_ps) in cast_smu8_power_state() argument
53 if (smu8_magic != hw_ps->magic) in cast_smu8_power_state()
56 return (struct smu8_power_state *)hw_ps; in cast_smu8_power_state()
60 const struct pp_hw_power_state *hw_ps) in cast_const_smu8_power_state() argument
62 if (smu8_magic != hw_ps->magic) in cast_const_smu8_power_state()
65 return (struct smu8_power_state *)hw_ps; in cast_const_smu8_power_state()
1371 struct pp_hw_power_state *hw_ps) in smu8_dpm_patch_boot_state() argument
1374 struct smu8_power_state *smu8_ps = cast_smu8_power_state(hw_ps); in smu8_dpm_patch_boot_state()
1386 struct pp_hw_power_state *hw_ps, in smu8_dpm_get_pp_table_entry_callback() argument
1390 struct smu8_power_state *smu8_ps = cast_smu8_power_state(hw_ps); in smu8_dpm_get_pp_table_entry_callback()
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| H A D | smu7_hwmgr.c | 178 struct pp_hw_power_state *hw_ps) in cast_phw_smu7_power_state() argument
180 PP_ASSERT_WITH_CODE((PhwVIslands_Magic == hw_ps->magic), in cast_phw_smu7_power_state()
184 return (struct smu7_power_state *)hw_ps; in cast_phw_smu7_power_state()
188 const struct pp_hw_power_state *hw_ps) in cast_const_phw_smu7_power_state() argument
190 PP_ASSERT_WITH_CODE((PhwVIslands_Magic == hw_ps->magic), in cast_const_phw_smu7_power_state()
194 return (const struct smu7_power_state *)hw_ps; in cast_const_phw_smu7_power_state()
3532 struct pp_hw_power_state *hw_ps) in smu7_dpm_patch_boot_state() argument
3535 struct smu7_power_state *ps = (struct smu7_power_state *)hw_ps; in smu7_dpm_patch_boot_state()
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| H A D | vega10_hwmgr.c | 96 struct pp_hw_power_state *hw_ps) in cast_phw_vega10_power_state() argument
98 PP_ASSERT_WITH_CODE((PhwVega10_Magic == hw_ps->magic), in cast_phw_vega10_power_state()
102 return (struct vega10_power_state *)hw_ps; in cast_phw_vega10_power_state()
106 const struct pp_hw_power_state *hw_ps) in cast_const_phw_vega10_power_state() argument
108 PP_ASSERT_WITH_CODE((PhwVega10_Magic == hw_ps->magic), in cast_const_phw_vega10_power_state()
112 return (const struct vega10_power_state *)hw_ps; in cast_const_phw_vega10_power_state()
3270 struct pp_hw_power_state *hw_ps) in vega10_patch_boot_state() argument
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| H A D | vega12_hwmgr.c | 1115 struct pp_hw_power_state *hw_ps) in vega12_patch_boot_state() argument
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