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Searched refs:hw_pp (Results 1 – 2 of 2) sorted by relevance

/linux/drivers/gpu/drm/msm/disp/dpu1/
H A Ddpu_encoder.c136 * @hw_pp: Handle to the pingpong blocks used for the display. No.
185 struct dpu_hw_pingpong *hw_pp[MAX_CHANNELS_PER_ENC]; member
387 static void _dpu_encoder_setup_dither(struct dpu_hw_pingpong *hw_pp, unsigned bpc) in _dpu_encoder_setup_dither() argument
391 if (!hw_pp->ops.setup_dither) in _dpu_encoder_setup_dither()
403 hw_pp->ops.setup_dither(hw_pp, NULL); in _dpu_encoder_setup_dither()
410 hw_pp->ops.setup_dither(hw_pp, &dither_cfg); in _dpu_encoder_setup_dither()
443 phys_enc->hw_pp->idx - PINGPONG_0, intr_idx); in dpu_encoder_helper_report_irq_timeout()
491 DPU_IRQ_REG(irq_idx), DPU_IRQ_BIT(irq_idx), phys_enc->hw_pp in dpu_encoder_helper_wait_for_irq()
1160 struct dpu_hw_blk *hw_pp[MAX_CHANNELS_PER_ENC]; dpu_encoder_virt_atomic_mode_set() local
1993 dpu_encoder_dsc_pipe_cfg(struct dpu_hw_ctl * ctl,struct dpu_hw_dsc * hw_dsc,struct dpu_hw_pingpong * hw_pp,struct drm_dsc_config * dsc,u32 common_mode,u32 initial_lines) dpu_encoder_dsc_pipe_cfg() argument
2023 struct dpu_hw_pingpong *hw_pp[MAX_CHANNELS_PER_ENC]; dpu_encoder_prep_dsc() local
2221 dpu_encoder_dsc_pipe_clr(struct dpu_hw_ctl * ctl,struct dpu_hw_dsc * hw_dsc,struct dpu_hw_pingpong * hw_pp) dpu_encoder_dsc_pipe_clr() argument
2242 struct dpu_hw_pingpong *hw_pp[MAX_CHANNELS_PER_ENC]; dpu_encoder_unprep_dsc() local
2396 struct dpu_hw_pingpong *hw_pp = dpu_encoder_helper_phys_setup_cwb() local
2422 struct dpu_hw_pingpong *hw_pp; dpu_encoder_helper_phys_setup_cdm() local
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H A Ddpu_encoder_phys.h181 struct dpu_hw_pingpong *hw_pp; member