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Searched refs:hw_plane (Results 1 – 3 of 3) sorted by relevance

/linux/drivers/gpu/drm/tidss/
H A Dtidss_dispc.c425 void dispc_vid_write(struct dispc_device *dispc, u32 hw_plane, u16 reg, u32 val) in dispc_vid_write() argument
427 void __iomem *base = dispc->base_vid[hw_plane]; in dispc_vid_write()
432 static u32 dispc_vid_read(struct dispc_device *dispc, u32 hw_plane, u16 reg) in dispc_vid_read() argument
434 void __iomem *base = dispc->base_vid[hw_plane]; in dispc_vid_read()
506 static u32 VID_REG_GET(struct dispc_device *dispc, u32 hw_plane, u32 idx, in VID_REG_GET() argument
509 return FLD_GET(dispc_vid_read(dispc, hw_plane, idx), start, end); in VID_REG_GET()
512 static void VID_REG_FLD_MOD(struct dispc_device *dispc, u32 hw_plane, u32 idx, in VID_REG_FLD_MOD() argument
515 dispc_vid_write(dispc, hw_plane, idx, in VID_REG_FLD_MOD()
516 FLD_MOD(dispc_vid_read(dispc, hw_plane, idx), in VID_REG_FLD_MOD()
580 static dispc_irq_t dispc_vid_irq_from_raw(u32 stat, u32 hw_plane) in dispc_vid_irq_from_raw() argument
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H A Dtidss_dispc.h100 void dispc_ovr_set_plane(struct dispc_device *dispc, u32 hw_plane,
128 int dispc_plane_check(struct dispc_device *dispc, u32 hw_plane,
131 void dispc_plane_setup(struct dispc_device *dispc, u32 hw_plane,
134 void dispc_plane_enable(struct dispc_device *dispc, u32 hw_plane, bool enable);
H A Dtidss_plane.c33 u32 hw_plane = tplane->hw_plane_id; in tidss_plane_atomic_check() local
101 ret = dispc_plane_check(tidss->dispc, hw_plane, new_plane_state, in tidss_plane_atomic_check()