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Searched refs:hw_dbg (Results 1 – 17 of 17) sorted by relevance

/linux/drivers/net/ethernet/intel/igc/
H A Digc_mac.c40 hw_dbg("Master requests are pending.\n"); in igc_disable_pcie_master()
64 hw_dbg("Programming MAC Address into RAR[0]\n"); in igc_init_rx_addrs()
69 hw_dbg("Clearing RAR[1-%u]\n", rar_count - 1); in igc_init_rx_addrs()
141 hw_dbg("After fix-ups FlowControl is now = %x\n", hw->fc.current_mode); in igc_setup_link()
153 hw_dbg("Initializing the Flow Control address, type and timer regs\n"); in igc_setup_link()
200 hw_dbg("hw->fc.current_mode = %u\n", hw->fc.current_mode); in igc_force_mac_fc()
218 hw_dbg("Flow control param set incorrectly\n"); in igc_force_mac_fc()
402 hw_dbg("Error configuring flow control\n"); in igc_check_for_copper_link()
459 hw_dbg("Error forcing flow control settings\n"); in igc_config_fc_after_link_up()
482 hw_dbg("Copper PHY and Auto Neg has not completed.\n"); in igc_config_fc_after_link_up()
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H A Digc_phy.c197 hw_dbg("Timeout is expired after a phy reset\n"); in igc_phy_hw_reset()
267 hw_dbg("autoneg_advertised %x\n", phy->autoneg_advertised); in igc_phy_setup_autoneg()
271 hw_dbg("Advertise 10mb Half duplex\n"); in igc_phy_setup_autoneg()
277 hw_dbg("Advertise 10mb Full duplex\n"); in igc_phy_setup_autoneg()
283 hw_dbg("Advertise 100mb Half duplex\n"); in igc_phy_setup_autoneg()
289 hw_dbg("Advertise 100mb Full duplex\n"); in igc_phy_setup_autoneg()
295 hw_dbg("Advertise 1000mb Half duplex request denied!\n"); in igc_phy_setup_autoneg()
299 hw_dbg("Advertise 1000mb Full duplex\n"); in igc_phy_setup_autoneg()
305 hw_dbg("Advertise 2500mb Half duplex request denied!\n"); in igc_phy_setup_autoneg()
309 hw_dbg("Advertise 2500mb Full duplex\n"); in igc_phy_setup_autoneg()
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H A Digc_base.c29 hw_dbg("PCI-E Master disable polling has failed\n"); in igc_reset_hw_base()
31 hw_dbg("Masking off all interrupts\n"); in igc_reset_hw_base()
42 hw_dbg("Issuing a global reset to MAC\n"); in igc_reset_hw_base()
51 hw_dbg("Auto Read Done did not complete\n"); in igc_reset_hw_base()
177 hw_dbg("Error resetting the PHY\n"); in igc_init_phy_params_base()
291 hw_dbg("Zeroing the MTA\n"); in igc_init_hw_base()
296 hw_dbg("Zeroing the UTA\n"); in igc_init_hw_base()
366 hw_dbg("Queue disable timed out after 10ms\n"); in igc_rx_fifo_flush_base()
/linux/drivers/net/ethernet/intel/igb/
H A De1000_mac.c113 hw_dbg("Programming MAC Address into RAR[0]\n"); in igb_init_rx_addrs()
118 hw_dbg("Clearing RAR[1-%u]\n", rar_count-1); in igb_init_rx_addrs()
303 hw_dbg("NVM Read Error\n"); in igb_check_alt_mac_addr()
323 hw_dbg("NVM Read Error\n"); in igb_check_alt_mac_addr()
333 hw_dbg("Ignoring Alternate Mac Address with MC bit set\n"); in igb_check_alt_mac_addr()
509 hw_dbg("Failed to update MTA_REGISTER, too many retries"); in igb_i21x_hw_doublecheck()
662 hw_dbg("Error configuring flow control\n"); in igb_check_for_copper_link()
703 hw_dbg("After fix-ups FlowControl is now = %x\n", hw->fc.current_mode); in igb_setup_link()
715 hw_dbg("Initializing the Flow Control address, type and timer regs\n"); in igb_setup_link()
812 hw_dbg("NVM Read Error\n"); in igb_set_default_fc()
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H A De1000_phy.c120 hw_dbg("PHY Address %d is out of range\n", offset); in igb_read_phy_reg_mdic()
146 hw_dbg("MDI Read did not complete\n"); in igb_read_phy_reg_mdic()
151 hw_dbg("MDI Error\n"); in igb_read_phy_reg_mdic()
176 hw_dbg("PHY Address %d is out of range\n", offset); in igb_write_phy_reg_mdic()
203 hw_dbg("MDI Write did not complete\n"); in igb_write_phy_reg_mdic()
208 hw_dbg("MDI Error\n"); in igb_write_phy_reg_mdic()
249 hw_dbg("I2CCMD Read did not complete\n"); in igb_read_phy_reg_i2c()
253 hw_dbg("I2CCMD Error bit set\n"); in igb_read_phy_reg_i2c()
279 hw_dbg("PHY I2C Address %d is out of range.\n", in igb_write_phy_reg_i2c()
306 hw_dbg("I2CCMD Write did not complete\n"); in igb_write_phy_reg_i2c()
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H A De1000_hw.h545 #define hw_dbg(format, arg...) \ macro
H A Digb_ethtool.c3210 …hw_dbg("Address change required to access page 0xA2, but not supported. Please report the module t… in igb_get_module_info()
/linux/drivers/net/ethernet/intel/i40e/
H A Di40e_lan_hmc.c112 …hw_dbg(hw, "i40e_init_lan_hmc: Tx context: asks for 0x%x but max allowed is 0x%x, returns error %d… in i40e_init_lan_hmc()
135 …hw_dbg(hw, "i40e_init_lan_hmc: Rx context: asks for 0x%x but max allowed is 0x%x, returns error %d… in i40e_init_lan_hmc()
158 …hw_dbg(hw, "i40e_init_lan_hmc: FCoE context: asks for 0x%x but max allowed is 0x%x, returns error … in i40e_init_lan_hmc()
181 …hw_dbg(hw, "i40e_init_lan_hmc: FCoE filter: asks for 0x%x but max allowed is 0x%x, returns error %… in i40e_init_lan_hmc()
290 hw_dbg(hw, "i40e_create_lan_hmc_object: bad info ptr\n"); in i40e_create_lan_hmc_object()
295 hw_dbg(hw, "i40e_create_lan_hmc_object: bad hmc_info ptr\n"); in i40e_create_lan_hmc_object()
300 hw_dbg(hw, "i40e_create_lan_hmc_object: bad signature\n"); in i40e_create_lan_hmc_object()
306 hw_dbg(hw, "i40e_create_lan_hmc_object: returns error %d\n", in i40e_create_lan_hmc_object()
313 hw_dbg(hw, "i40e_create_lan_hmc_object: returns error %d\n", in i40e_create_lan_hmc_object()
475 hw_dbg(hw, "i40e_configure_lan_hmc: Unknown SD type: %d\n", in i40e_configure_lan_hmc()
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H A Di40e_hmc.c31 hw_dbg(hw, "i40e_add_sd_table_entry: bad sd_entry\n"); in i40e_add_sd_table_entry()
37 hw_dbg(hw, "i40e_add_sd_table_entry: bad sd_index\n"); in i40e_add_sd_table_entry()
118 hw_dbg(hw, "i40e_add_pd_table_entry: bad pd_index\n"); in i40e_add_pd_table_entry()
197 hw_dbg(hw, "i40e_remove_pd_bp: bad idx\n"); in i40e_remove_pd_bp()
203 hw_dbg(hw, "i40e_remove_pd_bp: wrong sd_entry type\n"); in i40e_remove_pd_bp()
H A Di40e_debug.h39 #define hw_dbg(hw, S, A...) dev_dbg(i40e_hw_to_dev(hw), S, ##A) macro
H A Di40e_common.c66 hw_dbg(hw, "i40e_set_mac_type found mac: %d, returns: %d\n", in i40e_set_mac_type()
525 hw_dbg(hw, "Failed to read PBA flags.\n"); in i40e_get_pba_string()
529 hw_dbg(hw, "PBA block is not present.\n"); in i40e_get_pba_string()
535 hw_dbg(hw, "Failed to read PBA Block pointer.\n"); in i40e_get_pba_string()
541 hw_dbg(hw, "Failed to read PBA Block size.\n"); in i40e_get_pba_string()
551 hw_dbg(hw, "PBA ID is empty.\n"); in i40e_get_pba_string()
563 hw_dbg(hw, "Failed to read PBA Block word %d.\n", i); in i40e_get_pba_string()
650 hw_dbg(hw, "Global reset failed.\n"); in i40e_poll_globr()
651 hw_dbg(hw, "I40E_GLGEN_RSTAT = 0x%x\n", reg); in i40e_poll_globr()
691 hw_dbg(hw, "Global reset polling failed to complete.\n"); in i40e_pf_reset()
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/linux/drivers/net/ethernet/intel/ixgbe/
H A Dixgbe_82598.c295 hw_dbg(hw, "Invalid water mark configuration\n"); in ixgbe_fc_enable_82598()
372 hw_dbg(hw, "Flow control param set incorrectly\n"); in ixgbe_fc_enable_82598()
443 hw_dbg(hw, "Autonegotiation did not complete.\n"); in ixgbe_start_mac_link_82598()
481 hw_dbg(hw, "Link was indicated but link is down\n"); in ixgbe_validate_link_ready()
732 hw_dbg(hw, "Reset polling failed to complete.\n"); in ixgbe_reset_hw_82598()
792 hw_dbg(hw, "RAR index %d is out of range.\n", rar); in ixgbe_set_vmdq_82598()
817 hw_dbg(hw, "RAR index %d is out of range.\n", rar); in ixgbe_clear_vmdq_82598()
996 hw_dbg(hw, "EEPROM read did not pass.\n"); in ixgbe_read_i2c_phy_82598()
H A Dixgbe_common.h185 #define hw_dbg(hw, format, arg...) \ macro
H A Dixgbe_e610.c2232 hw_dbg(hw, "Eeprom params: type = %d, size = %d\n", eeprom->type, in ixgbe_init_eeprom_params_e610()
H A Dixgbe_main.c3990 hw_dbg(hw, "Could not enable Tx Queue %d\n", reg_idx); in ixgbe_configure_tx_ring()
/linux/drivers/net/ethernet/intel/ixgbevf/
H A Dixgbevf_main.c1568 hw_dbg(&adapter->hw, in ixgbevf_request_msix_irqs()
1578 hw_dbg(&adapter->hw, "request_irq for msix_other failed: %d\n", in ixgbevf_request_msix_irqs()
1617 hw_dbg(&adapter->hw, "request_irq failed, Error %d\n", err); in ixgbevf_request_irq()
1746 hw_dbg(hw, "Could not enable Tx Queue %d\n", reg_idx); in ixgbevf_configure_tx_ring()
2587 hw_dbg(hw, "PF still resetting\n"); in ixgbevf_reset()
3014 hw_dbg(&adapter->hw, in ixgbevf_init_interrupt_scheme()
3021 hw_dbg(&adapter->hw, "Unable to allocate memory for queue vectors\n"); in ixgbevf_init_interrupt_scheme()
3025 …hw_dbg(&adapter->hw, "Multiqueue %s: Rx Queue count = %u, Tx Queue count = %u XDP Queue count %u\n… in ixgbevf_init_interrupt_scheme()
3471 hw_dbg(&adapter->hw, "Unable to allocate memory for the transmit descriptor ring\n"); in ixgbevf_setup_tx_resources()
3493 hw_dbg(&adapter->hw, "Allocation for Tx Queue %u failed\n", i); in ixgbevf_setup_all_tx_resources()
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H A Dixgbevf.h483 #define hw_dbg(hw, format, arg...) \ macro