Searched refs:hw_ctl (Results 1 – 5 of 5) sorted by relevance
232 (phys_enc->hw_ctl && in dpu_encoder_phys_wb_setup_ctl()233 phys_enc->hw_ctl->ops.setup_intf_cfg)) { in dpu_encoder_phys_wb_setup_ctl()257 phys_enc->hw_ctl->ops.setup_intf_cfg(phys_enc->hw_ctl, &intf_cfg); in dpu_encoder_phys_wb_setup_ctl()258 } else if (phys_enc->hw_ctl && phys_enc->hw_ctl->ops.setup_intf_cfg) { in dpu_encoder_phys_wb_setup_ctl()265 phys_enc->hw_ctl->ops.setup_intf_cfg(phys_enc->hw_ctl, &intf_cfg); in dpu_encoder_phys_wb_setup_ctl()276 struct dpu_hw_ctl *hw_ctl; in _dpu_encoder_phys_wb_update_flush() local287 hw_ctl = phys_enc->hw_ctl; in _dpu_encoder_phys_wb_update_flush()293 if (!hw_ctl) { in _dpu_encoder_phys_wb_update_flush()298 if (hw_ctl->ops.update_pending_flush_wb) in _dpu_encoder_phys_wb_update_flush()299 hw_ctl->ops.update_pending_flush_wb(hw_ctl, hw_wb->idx); in _dpu_encoder_phys_wb_update_flush()[all …]
267 if (!phys_enc->hw_ctl->ops.setup_intf_cfg) { in dpu_encoder_phys_vid_setup_timing_engine()317 phys_enc->hw_ctl->ops.setup_intf_cfg(phys_enc->hw_ctl, &intf_cfg); in dpu_encoder_phys_vid_setup_timing_engine()336 struct dpu_hw_ctl *hw_ctl; in dpu_encoder_phys_vid_vblank_irq() local340 hw_ctl = phys_enc->hw_ctl; in dpu_encoder_phys_vid_vblank_irq()354 if (hw_ctl->ops.get_flush_register) in dpu_encoder_phys_vid_vblank_irq()355 flush_register = hw_ctl->ops.get_flush_register(hw_ctl); in dpu_encoder_phys_vid_vblank_irq()357 if (!(flush_register & hw_ctl->ops.get_pending_flush(hw_ctl))) in dpu_encoder_phys_vid_vblank_irq()451 ctl = phys_enc->hw_ctl; in dpu_encoder_phys_vid_enable()533 struct dpu_hw_ctl *hw_ctl = phys_enc->hw_ctl; in dpu_encoder_phys_vid_wait_for_commit_done() local536 if (!hw_ctl) in dpu_encoder_phys_vid_wait_for_commit_done()[all …]
1161 struct dpu_hw_blk *hw_ctl[MAX_CHANNELS_PER_ENC]; in dpu_encoder_virt_atomic_mode_set() local1217 drm_enc->crtc, DPU_HW_BLK_CTL, hw_ctl, ARRAY_SIZE(hw_ctl)); in dpu_encoder_virt_atomic_mode_set()1261 phys->hw_ctl = to_dpu_hw_ctl(hw_ctl[0]); in dpu_encoder_virt_atomic_mode_set()1263 phys->hw_ctl = i < num_ctl ? to_dpu_hw_ctl(hw_ctl[i]) : NULL; in dpu_encoder_virt_atomic_mode_set()1264 if (!phys->hw_ctl) { in dpu_encoder_virt_atomic_mode_set()1644 ctl = phys->hw_ctl; in _dpu_encoder_trigger_flush()1717 ctl = phys_enc->hw_ctl; in dpu_encoder_helper_trigger_start()1759 ctl = phys_enc->hw_ctl; in dpu_encoder_helper_hw_reset()1804 ctl = phys->hw_ctl; in _dpu_encoder_kickoff_phys()1857 ctl = phys->hw_ctl; in dpu_encoder_trigger_kickoff_pending()[all …]
180 struct dpu_hw_ctl *hw_ctl; member
1378 struct dpu_hw_blk *hw_ctl[MAX_CHANNELS_PER_CRTC]; in dpu_crtc_assign_resources() local1410 DPU_HW_BLK_CTL, hw_ctl, in dpu_crtc_assign_resources()1411 ARRAY_SIZE(hw_ctl)); in dpu_crtc_assign_resources()1425 cstate->mixers[i].lm_ctl = to_dpu_hw_ctl(hw_ctl[ctl_idx]); in dpu_crtc_assign_resources()