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Searched refs:hw (Results 1 – 25 of 2300) sorted by relevance

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/linux/drivers/clk/sprd/
H A Dsc9863a-clk.c57 [CLK_MPLL0_GATE] = &mpll0_gate.common.hw,
58 [CLK_DPLL0_GATE] = &dpll0_gate.common.hw,
59 [CLK_LPLL_GATE] = &lpll_gate.common.hw,
60 [CLK_GPLL_GATE] = &gpll_gate.common.hw,
61 [CLK_DPLL1_GATE] = &dpll1_gate.common.hw,
62 [CLK_MPLL1_GATE] = &mpll1_gate.common.hw,
63 [CLK_MPLL2_GATE] = &mpll2_gate.common.hw,
64 [CLK_ISPPLL_GATE] = &isppll_gate.common.hw,
93 static CLK_FIXED_FACTOR_HW(twpll_768m, "twpll-768m", &twpll.common.hw, 2, 1, 0);
94 static CLK_FIXED_FACTOR_HW(twpll_384m, "twpll-384m", &twpll.common.hw, 4, 1, 0);
[all …]
/linux/drivers/net/ethernet/intel/ixgbe/
H A Dixgbe_phy.c12 static void ixgbe_i2c_start(struct ixgbe_hw *hw);
13 static void ixgbe_i2c_stop(struct ixgbe_hw *hw);
14 static int ixgbe_clock_in_i2c_byte(struct ixgbe_hw *hw, u8 *data);
15 static int ixgbe_clock_out_i2c_byte(struct ixgbe_hw *hw, u8 data);
16 static int ixgbe_get_i2c_ack(struct ixgbe_hw *hw);
17 static int ixgbe_clock_in_i2c_bit(struct ixgbe_hw *hw, bool *data);
18 static int ixgbe_clock_out_i2c_bit(struct ixgbe_hw *hw, bool data);
19 static void ixgbe_raise_i2c_clk(struct ixgbe_hw *hw, u32 *i2cctl);
20 static void ixgbe_lower_i2c_clk(struct ixgbe_hw *hw, u32 *i2cctl);
21 static int ixgbe_set_i2c_data(struct ixgbe_hw *hw, u32 *i2cctl, bool data);
[all …]
H A Dixgbe_82598.c19 static int ixgbe_setup_copper_link_82598(struct ixgbe_hw *hw,
22 static int ixgbe_read_i2c_eeprom_82598(struct ixgbe_hw *hw, u8 byte_offset,
35 static void ixgbe_set_pcie_completion_timeout(struct ixgbe_hw *hw) in ixgbe_set_pcie_completion_timeout() argument
37 u32 gcr = IXGBE_READ_REG(hw, IXGBE_GCR); in ixgbe_set_pcie_completion_timeout()
40 if (ixgbe_removed(hw->hw_addr)) in ixgbe_set_pcie_completion_timeout()
61 pcie_devctl2 = ixgbe_read_pci_cfg_word(hw, IXGBE_PCI_DEVICE_CONTROL2); in ixgbe_set_pcie_completion_timeout()
63 ixgbe_write_pci_cfg_word(hw, IXGBE_PCI_DEVICE_CONTROL2, pcie_devctl2); in ixgbe_set_pcie_completion_timeout()
67 IXGBE_WRITE_REG(hw, IXGBE_GCR, gcr); in ixgbe_set_pcie_completion_timeout()
70 static int ixgbe_get_invariants_82598(struct ixgbe_hw *hw) in ixgbe_get_invariants_82598() argument
72 struct ixgbe_mac_info *mac = &hw->mac; in ixgbe_get_invariants_82598()
[all …]
/linux/drivers/clk/meson/
H A Dg12a.c173 .hw.init = &(struct clk_init_data){
190 .hw.init = &(struct clk_init_data){
194 &g12a_fixed_pll_dco.hw
238 .hw.init = &(struct clk_init_data){
257 .hw.init = &(struct clk_init_data){
261 &g12a_sys_pll_dco.hw
297 .hw.init = &(struct clk_init_data){
316 .hw.init = &(struct clk_init_data){
320 &g12b_sys1_pll_dco.hw
332 .hw.init = &(struct clk_init_data) {
[all …]
H A Dmeson8b.c155 .hw.init = &(struct clk_init_data){
174 .hw.init = &(struct clk_init_data){
178 &meson8b_fixed_pll_dco.hw
191 .hw.init = &(struct clk_init_data){
274 .hw.init = &(struct clk_init_data){
279 &hdmi_pll_dco_in.hw
292 .hw.init = &(struct clk_init_data){
296 &meson8b_hdmi_pll_dco.hw
310 .hw.init = &(struct clk_init_data){
314 &meson8b_hdmi_pll_dco.hw
[all …]
H A Dgxbb.c152 .hw.init = &(struct clk_init_data){
169 .hw.init = &(struct clk_init_data){
173 &gxbb_fixed_pll_dco.hw
186 .hw.init = &(struct clk_init_data){
229 .hw.init = &(struct clk_init_data){
233 &gxbb_hdmi_pll_pre_mult.hw
283 .hw.init = &(struct clk_init_data){
305 .hw.init = &(struct clk_init_data){
309 &gxbb_hdmi_pll_dco.hw
323 .hw.init = &(struct clk_init_data){
[all …]
H A Ds4-peripherals.c79 .hw.init = &(struct clk_init_data) {
129 .hw.init = &(struct clk_init_data){
133 &s4_rtc_32k_by_oscin_clkin.hw
146 .hw.init = &(struct clk_init_data){
150 &s4_rtc_32k_by_oscin_div.hw,
151 &s4_rtc_32k_by_oscin_clkin.hw,
163 .hw.init = &(struct clk_init_data) {
167 &s4_rtc_32k_by_oscin_sel.hw
181 .hw.init = &(struct clk_init_data){
185 &s4_rtc_32k_by_oscin.hw,
[all …]
H A Daxg.c144 .hw.init = &(struct clk_init_data){
161 .hw.init = &(struct clk_init_data){
165 &axg_fixed_pll_dco.hw
203 .hw.init = &(struct clk_init_data){
220 .hw.init = &(struct clk_init_data){
224 &axg_sys_pll_dco.hw
308 .hw.init = &(struct clk_init_data){
325 .hw.init = &(struct clk_init_data){
329 &axg_gp0_pll_dco.hw
381 .hw.init = &(struct clk_init_data){
[all …]
/linux/drivers/net/ethernet/atheros/alx/
H A Dhw.c46 static int alx_wait_mdio_idle(struct alx_hw *hw) in alx_wait_mdio_idle() argument
52 val = alx_read_mem32(hw, ALX_MDIO); in alx_wait_mdio_idle()
61 static int alx_read_phy_core(struct alx_hw *hw, bool ext, u8 dev, in alx_read_phy_core() argument
70 clk_sel = hw->link_speed != SPEED_UNKNOWN ? in alx_read_phy_core()
77 alx_write_mem32(hw, ALX_MDIO_EXTN, val); in alx_read_phy_core()
88 alx_write_mem32(hw, ALX_MDIO, val); in alx_read_phy_core()
90 err = alx_wait_mdio_idle(hw); in alx_read_phy_core()
93 val = alx_read_mem32(hw, ALX_MDIO); in alx_read_phy_core()
98 static int alx_write_phy_core(struct alx_hw *hw, bool ext, u8 dev, in alx_write_phy_core() argument
104 clk_sel = hw->link_speed != SPEED_UNKNOWN ? in alx_write_phy_core()
[all …]
/linux/drivers/net/ethernet/intel/i40e/
H A Di40e_adminq.c9 static void i40e_resume_aq(struct i40e_hw *hw);
15 static int i40e_alloc_adminq_asq_ring(struct i40e_hw *hw) in i40e_alloc_adminq_asq_ring() argument
19 ret_code = i40e_allocate_dma_mem(hw, &hw->aq.asq.desc_buf, in i40e_alloc_adminq_asq_ring()
20 (hw->aq.num_asq_entries * in i40e_alloc_adminq_asq_ring()
26 ret_code = i40e_allocate_virt_mem(hw, &hw->aq.asq.cmd_buf, in i40e_alloc_adminq_asq_ring()
27 (hw->aq.num_asq_entries * in i40e_alloc_adminq_asq_ring()
30 i40e_free_dma_mem(hw, &hw->aq.asq.desc_buf); in i40e_alloc_adminq_asq_ring()
41 static int i40e_alloc_adminq_arq_ring(struct i40e_hw *hw) in i40e_alloc_adminq_arq_ring() argument
45 ret_code = i40e_allocate_dma_mem(hw, &hw->aq.arq.desc_buf, in i40e_alloc_adminq_arq_ring()
46 (hw->aq.num_arq_entries * in i40e_alloc_adminq_arq_ring()
[all …]
H A Di40e_nvm.c19 int i40e_init_nvm(struct i40e_hw *hw) in i40e_init_nvm() argument
21 struct i40e_nvm_info *nvm = &hw->nvm; in i40e_init_nvm()
29 gens = rd32(hw, I40E_GLNVM_GENS); in i40e_init_nvm()
35 fla = rd32(hw, I40E_GLNVM_FLA); in i40e_init_nvm()
43 i40e_debug(hw, I40E_DEBUG_NVM, "NVM init error: unsupported blank mode.\n"); in i40e_init_nvm()
57 int i40e_acquire_nvm(struct i40e_hw *hw, in i40e_acquire_nvm() argument
64 if (hw->nvm.blank_nvm_mode) in i40e_acquire_nvm()
67 ret_code = i40e_aq_request_resource(hw, I40E_NVM_RESOURCE_ID, access, in i40e_acquire_nvm()
70 gtime = rd32(hw, I40E_GLVFGEN_TIMER); in i40e_acquire_nvm()
73 hw->nvm.hw_semaphore_timeout = I40E_MS_TO_GTIME(time_left) + gtime; in i40e_acquire_nvm()
[all …]
/linux/drivers/isdn/hardware/mISDN/
H A DmISDNinfineon.c268 struct inf_hw *hw = dev_id; in diva_irq() local
271 spin_lock(&hw->lock); in diva_irq()
272 val = inb((u32)hw->cfg.start + DIVA_PCI_CTRL); in diva_irq()
274 spin_unlock(&hw->lock); in diva_irq()
277 hw->irqcnt++; in diva_irq()
278 mISDNipac_irq(&hw->ipac, irqloops); in diva_irq()
279 spin_unlock(&hw->lock); in diva_irq()
286 struct inf_hw *hw = dev_id; in diva20x_irq() local
289 spin_lock(&hw->lock); in diva20x_irq()
290 val = readb(hw->cfg.p); in diva20x_irq()
[all …]
H A Dhfcsusb.c42 static void hfcsusb_ph_command(struct hfcsusb *hw, u_char command);
43 static void release_hw(struct hfcsusb *hw);
44 static void reset_hfcsusb(struct hfcsusb *hw);
45 static void setPortMode(struct hfcsusb *hw);
46 static void hfcsusb_start_endpoint(struct hfcsusb *hw, int channel);
47 static void hfcsusb_stop_endpoint(struct hfcsusb *hw, int channel);
50 static int hfcsusb_ph_info(struct hfcsusb *hw);
54 ctrl_start_transfer(struct hfcsusb *hw) in ctrl_start_transfer() argument
57 printk(KERN_DEBUG "%s: %s\n", hw->name, __func__); in ctrl_start_transfer()
59 if (hw->ctrl_cnt) { in ctrl_start_transfer()
[all …]
/linux/drivers/spi/
H A Dspi-altera-core.c43 static int altr_spi_writel(struct altera_spi *hw, unsigned int reg, in altr_spi_writel() argument
48 ret = regmap_write(hw->regmap, hw->regoff + reg, val); in altr_spi_writel()
50 dev_err(hw->dev, "fail to write reg 0x%x val 0x%x: %d\n", in altr_spi_writel()
56 static int altr_spi_readl(struct altera_spi *hw, unsigned int reg, in altr_spi_readl() argument
61 ret = regmap_read(hw->regmap, hw->regoff + reg, val); in altr_spi_readl()
63 dev_err(hw->dev, "fail to read reg 0x%x: %d\n", reg, ret); in altr_spi_readl()
75 struct altera_spi *hw = altera_spi_to_hw(spi); in altera_spi_set_cs() local
78 hw->imr &= ~ALTERA_SPI_CONTROL_SSO_MSK; in altera_spi_set_cs()
79 altr_spi_writel(hw, ALTERA_SPI_CONTROL, hw->imr); in altera_spi_set_cs()
80 altr_spi_writel(hw, ALTERA_SPI_TARGET_SEL, 0); in altera_spi_set_cs()
[all …]
/linux/drivers/clk/qcom/
H A Dclk-rpmh.c52 struct clk_hw hw; member
87 .hw.init = &(struct clk_init_data){ \
105 .hw.init = &(struct clk_init_data){ \
129 .hw.init = &(struct clk_init_data){ \
137 return container_of(_hw, struct clk_rpmh, hw); in to_clk_rpmh()
216 static int clk_rpmh_prepare(struct clk_hw *hw) in clk_rpmh_prepare() argument
218 struct clk_rpmh *c = to_clk_rpmh(hw); in clk_rpmh_prepare()
228 static void clk_rpmh_unprepare(struct clk_hw *hw) in clk_rpmh_unprepare() argument
230 struct clk_rpmh *c = to_clk_rpmh(hw); in clk_rpmh_unprepare()
237 static unsigned long clk_rpmh_recalc_rate(struct clk_hw *hw, in clk_rpmh_recalc_rate() argument
[all …]
/linux/drivers/net/ethernet/intel/iavf/
H A Diavf_adminq.c14 static enum iavf_status iavf_alloc_adminq_asq_ring(struct iavf_hw *hw) in iavf_alloc_adminq_asq_ring() argument
18 ret_code = iavf_allocate_dma_mem(hw, &hw->aq.asq.desc_buf, in iavf_alloc_adminq_asq_ring()
20 (hw->aq.num_asq_entries * in iavf_alloc_adminq_asq_ring()
26 ret_code = iavf_allocate_virt_mem(hw, &hw->aq.asq.cmd_buf, in iavf_alloc_adminq_asq_ring()
27 (hw->aq.num_asq_entries * in iavf_alloc_adminq_asq_ring()
30 iavf_free_dma_mem(hw, &hw->aq.asq.desc_buf); in iavf_alloc_adminq_asq_ring()
41 static enum iavf_status iavf_alloc_adminq_arq_ring(struct iavf_hw *hw) in iavf_alloc_adminq_arq_ring() argument
45 ret_code = iavf_allocate_dma_mem(hw, &hw->aq.arq.desc_buf, in iavf_alloc_adminq_arq_ring()
47 (hw->aq.num_arq_entries * in iavf_alloc_adminq_arq_ring()
61 static void iavf_free_adminq_asq(struct iavf_hw *hw) in iavf_free_adminq_asq() argument
[all …]
/linux/drivers/scsi/csiostor/
H A Dcsio_isr.c47 struct csio_hw *hw = (struct csio_hw *) dev_id; in csio_nondata_isr() local
51 if (unlikely(!hw)) in csio_nondata_isr()
54 if (unlikely(pci_channel_offline(hw->pdev))) { in csio_nondata_isr()
55 CSIO_INC_STATS(hw, n_pcich_offline); in csio_nondata_isr()
59 spin_lock_irqsave(&hw->lock, flags); in csio_nondata_isr()
60 csio_hw_slow_intr_handler(hw); in csio_nondata_isr()
61 rv = csio_mb_isr_handler(hw); in csio_nondata_isr()
63 if (rv == 0 && !(hw->flags & CSIO_HWF_FWEVT_PENDING)) { in csio_nondata_isr()
64 hw->flags |= CSIO_HWF_FWEVT_PENDING; in csio_nondata_isr()
65 spin_unlock_irqrestore(&hw->lock, flags); in csio_nondata_isr()
[all …]
H A Dcsio_hw.c102 static void csio_hw_initialize(struct csio_hw *hw);
103 static void csio_evtq_stop(struct csio_hw *hw);
104 static void csio_evtq_start(struct csio_hw *hw);
106 int csio_is_hw_ready(struct csio_hw *hw) in csio_is_hw_ready() argument
108 return csio_match_state(hw, csio_hws_ready); in csio_is_hw_ready()
111 int csio_is_hw_removing(struct csio_hw *hw) in csio_is_hw_removing() argument
113 return csio_match_state(hw, csio_hws_removing); in csio_is_hw_removing()
133 csio_hw_wait_op_done_val(struct csio_hw *hw, int reg, uint32_t mask, in csio_hw_wait_op_done_val() argument
138 val = csio_rd_reg32(hw, reg); in csio_hw_wait_op_done_val()
163 csio_hw_tp_wr_bits_indirect(struct csio_hw *hw, unsigned int addr, in csio_hw_tp_wr_bits_indirect() argument
[all …]
/linux/drivers/clk/sophgo/
H A Dclk-cv1800.c71 { .hw = &clk_mipimpll.common.hw },
75 { .hw = &clk_mipimpll.common.hw },
79 { .hw = &clk_fpll.common.hw },
167 { .hw = &clk_cam0pll.common.hw },
187 { .hw = &clk_tpll.common.hw },
188 { .hw = &clk_a0pll.common.hw },
189 { .hw = &clk_mipimpll.common.hw },
190 { .hw = &clk_fpll.common.hw },
211 { .hw = &clk_axi6.div.common.hw },
215 { .hw = &clk_axi6.div.common.hw },
[all …]
/linux/drivers/net/ethernet/atheros/atl1c/
H A Datl1c_hw.c19 int atl1c_check_eeprom_exist(struct atl1c_hw *hw) in atl1c_check_eeprom_exist() argument
23 AT_READ_REG(hw, REG_TWSI_DEBUG, &data); in atl1c_check_eeprom_exist()
27 AT_READ_REG(hw, REG_MASTER_CTRL, &data); in atl1c_check_eeprom_exist()
33 void atl1c_hw_set_mac_addr(struct atl1c_hw *hw, u8 *mac_addr) in atl1c_hw_set_mac_addr() argument
45 AT_WRITE_REG_ARRAY(hw, REG_MAC_STA_ADDR, 0, value); in atl1c_hw_set_mac_addr()
49 AT_WRITE_REG_ARRAY(hw, REG_MAC_STA_ADDR, 1, value); in atl1c_hw_set_mac_addr()
53 static bool atl1c_read_current_addr(struct atl1c_hw *hw, u8 *eth_addr) in atl1c_read_current_addr() argument
57 AT_READ_REG(hw, REG_MAC_STA_ADDR, &addr[0]); in atl1c_read_current_addr()
58 AT_READ_REG(hw, REG_MAC_STA_ADDR + 4, &addr[1]); in atl1c_read_current_addr()
70 static int atl1c_get_permanent_address(struct atl1c_hw *hw) in atl1c_get_permanent_address() argument
[all …]
/linux/drivers/clk/sunxi-ng/
H A Dccu-sun5i.c34 .hw.init = CLK_HW_INIT("pll-core",
74 .hw.init = CLK_HW_INIT("pll-audio-base",
91 .hw.init = CLK_HW_INIT("pll-video0",
106 .hw.init = CLK_HW_INIT("pll-ve",
119 .hw.init = CLK_HW_INIT("pll-ddr-base",
134 .hw.init = CLK_HW_INIT("pll-ddr-other", "pll-ddr-base",
148 .hw.init = CLK_HW_INIT("pll-periph",
165 .hw.init = CLK_HW_INIT("pll-video1",
190 .hw.init = CLK_HW_INIT_PARENTS("cpu",
214 .hw.init = CLK_HW_INIT_PARENTS("ahb",
[all …]
H A Dccu-sun55i-a523.c54 .hw.init = CLK_HW_INIT_PARENTS_DATA("pll-ddr0", osc24M,
74 .hw.init = CLK_HW_INIT_PARENTS_DATA("pll-periph0-4x",
90 &pll_periph0_4x_clk.common.hw
96 &pll_periph0_2x_clk.common.hw
103 &pll_periph0_480M_clk.common.hw
118 &pll_periph0_150M_clk.hw
129 .hw.init = CLK_HW_INIT_PARENTS_DATA("pll-periph1-4x",
136 &pll_periph1_4x_clk.common.hw
146 &pll_periph1_2x_clk.common.hw
159 &pll_periph1_480M_clk.common.hw
[all …]
H A Dccu-sun4i-a10.c38 .hw.init = CLK_HW_INIT("pll-core",
73 .hw.init = CLK_HW_INIT("pll-audio-base",
91 .hw.init = CLK_HW_INIT("pll-video0",
106 .hw.init = CLK_HW_INIT("pll-ve",
119 .hw.init = CLK_HW_INIT("pll-ve",
132 .hw.init = CLK_HW_INIT("pll-ddr-base",
146 .hw.init = CLK_HW_INIT("pll-ddr-other", "pll-ddr-base",
158 .hw.init = CLK_HW_INIT("pll-periph-base",
166 &pll_periph_base_clk.common.hw,
177 .hw.init = CLK_HW_INIT("pll-periph-sata",
[all …]
/linux/drivers/tty/ipwireless/
H A Dhardware.c31 static void ipw_send_setup_packet(struct ipw_hardware *hw);
37 static void handle_received_CTRL_packet(struct ipw_hardware *hw,
404 static void do_send_fragment(struct ipw_hardware *hw, unsigned char *data, in do_send_fragment() argument
411 BUG_ON(length > hw->ll_mtu); in do_send_fragment()
416 spin_lock_irqsave(&hw->lock, flags); in do_send_fragment()
418 hw->tx_ready = 0; in do_send_fragment()
421 if (hw->hw_version == HW_VERSION_1) { in do_send_fragment()
422 outw((unsigned short) length, hw->base_port + IODWR); in do_send_fragment()
431 outw(raw_data, hw->base_port + IODWR); in do_send_fragment()
434 outw(DCR_TXDONE, hw->base_port + IODCR); in do_send_fragment()
[all …]
/linux/drivers/net/ethernet/marvell/
H A Dsky2.c151 static int gm_phy_write(struct sky2_hw *hw, unsigned port, u16 reg, u16 val) in gm_phy_write() argument
155 gma_write16(hw, port, GM_SMI_DATA, val); in gm_phy_write()
156 gma_write16(hw, port, GM_SMI_CTRL, in gm_phy_write()
160 u16 ctrl = gma_read16(hw, port, GM_SMI_CTRL); in gm_phy_write()
170 dev_warn(&hw->pdev->dev, "%s: phy write timeout\n", hw->dev[port]->name); in gm_phy_write()
174 dev_err(&hw->pdev->dev, "%s: phy I/O error\n", hw->dev[port]->name); in gm_phy_write()
178 static int __gm_phy_read(struct sky2_hw *hw, unsigned port, u16 reg, u16 *val) in __gm_phy_read() argument
182 gma_write16(hw, port, GM_SMI_CTRL, GM_SMI_CT_PHY_AD(PHY_ADDR_MARV) in __gm_phy_read()
186 u16 ctrl = gma_read16(hw, port, GM_SMI_CTRL); in __gm_phy_read()
191 *val = gma_read16(hw, port, GM_SMI_DATA); in __gm_phy_read()
[all …]

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