Searched refs:hdr_mult (Results 1 – 10 of 10) sorted by relevance
1476 amdgpu_state->hdr_mult = AMDGPU_HDR_MULT_DEFAULT; in amdgpu_dm_plane_drm_plane_reset()1514 dm_plane_state->hdr_mult = old_dm_plane_state->hdr_mult; in amdgpu_dm_plane_drm_plane_duplicate_state()1690 if (dm_plane_state->hdr_mult != val) { in dm_atomic_plane_set_property()1691 dm_plane_state->hdr_mult = val; in dm_atomic_plane_set_property()1762 *val = dm_plane_state->hdr_mult; in dm_atomic_plane_get_property()
1583 dc_plane_state->hdr_mult = amdgpu_dm_fixpt_from_s3132(colorop_state->multiplier); in __set_dm_plane_colorop_multiplier()1829 dc_plane_state->hdr_mult = amdgpu_dm_fixpt_from_s3132(dm_plane_state->hdr_mult); in amdgpu_dm_plane_set_color_properties()
906 __u64 hdr_mult; member
9962 bundle->surface_updates[planes_count].hdr_mult = dc_plane->hdr_mult; in amdgpu_dm_commit_planes()10599 wb_info->dwb_params.hdr_mult = 0x1F000; in dm_set_writeback()11753 dm_old_other_state->hdr_mult != dm_new_other_state->hdr_mult || in should_reset_plane()
394 REG_UPDATE(DWB_HDR_MULT_COEF, DWB_HDR_MULT_COEF, params->hdr_mult); in dwb3_program_hdr_mult()
1411 uint32_t hdr_mult:1; member1461 struct fixed31_32 hdr_mult; member1832 struct fixed31_32 hdr_mult; member
428 unsigned int hdr_mult; /* must be in FP1.6.12 */ member
2897 if (u->hdr_mult.value) in det_surface_update()2898 if (u->hdr_mult.value != u->surface->hdr_mult.value) { in det_surface_update()2900 update_flags->bits.hdr_mult = 1; in det_surface_update()3186 if (srf_update->hdr_mult.value) in copy_surface_update_to_plane()3187 surface->hdr_mult = in copy_surface_update_to_plane()3188 srf_update->hdr_mult; in copy_surface_update_to_plane()5108 (srf_updates[i].hdr_mult.value && in full_update_required()5109 srf_updates[i].hdr_mult.value != srf_updates->surface->hdr_mult.value) || in full_update_required()
2164 pipe_ctx->plane_state->update_flags.bits.hdr_mult)) in dcn401_program_pipe()2314 pipe_ctx->plane_state->update_flags.bits.hdr_mult)) { in dcn401_program_pipe_sequence()3895 struct fixed31_32 multiplier = pipe_ctx->plane_state->hdr_mult; in dcn401_set_hdr_multiplier_sequence()
1981 pipe_ctx->plane_state->update_flags.bits.hdr_mult)) in dcn20_program_pipe()