| /linux/arch/arm64/include/asm/ |
| H A D | hardirq.h | 22 u64 hcr; member
58 ___ctx->hcr = ___hcr; \
70 ___hcr = ___ctx->hcr; \
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| /linux/drivers/usb/serial/ |
| H A D | ark3116.c | 67 __u32 hcr; /* handshake control register (0x8) member
145 priv->hcr = 0; in ark3116_port_probe()
200 __u8 lcr, hcr, eval; in ark3116_set_termios() local
215 hcr = (cflag & CRTSCTS) ? 0x03 : 0x00; in ark3116_set_termios()
246 __func__, hcr, lcr, quot); in ark3116_set_termios()
249 if (priv->hcr != hcr) { in ark3116_set_termios()
250 priv->hcr = hcr; in ark3116_set_termios()
251 ark3116_write_reg(serial, 0x8, hcr); in ark3116_set_termios()
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| /linux/arch/arm64/kvm/hyp/vhe/ |
| H A D | switch.c | 51 u64 hcr = vcpu->arch.hcr_el2; in __compute_hcr() local
54 return hcr; in __compute_hcr()
57 hcr |= HCR_NV | HCR_NV2 | HCR_AT | HCR_TTLB; in __compute_hcr()
60 hcr |= HCR_NV1; in __compute_hcr()
65 return hcr | (__vcpu_sys_reg(vcpu, HCR_EL2) & ~NV_HCR_GUEST_EXCLUDE); in __compute_hcr()
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| /linux/arch/arm64/kvm/ |
| H A D | at.c | 93 u64 hcr, sctlr, tcr, tg, ps, ia_bits, ttbr; in setup_s1_walk() local
97 hcr = __vcpu_sys_reg(vcpu, HCR_EL2); in setup_s1_walk()
107 wi->s2 = wi->regime == TR_EL10 && (hcr & (HCR_VM | HCR_DC)); in setup_s1_walk()
155 if (hcr & (HCR_DC | HCR_TGE)) { in setup_s1_walk()
418 u64 hcr; member
430 config->hcr = read_sysreg(hcr_el2); in __mmu_config_save()
435 write_sysreg(config->hcr, hcr_el2); in __mmu_config_restore()
922 write_sysreg((config.hcr & ~HCR_TGE) | HCR_VM, hcr_el2); in __kvm_at_s1e01_fast()
996 u64 val, hcr; in __kvm_at_s1e2() local
1001 val = hcr = read_sysreg(hcr_el2); in __kvm_at_s1e2()
[all …]
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| /linux/drivers/infiniband/hw/mthca/ |
| H A D | mthca_cmd.c | 194 return readl(dev->hcr + HCR_STATUS_OFFSET) & in go_bit()
257 __raw_writel((__force u32) cpu_to_be32(in_param >> 32), dev->hcr + 0 * 4); in mthca_cmd_post_hcr()
258 __raw_writel((__force u32) cpu_to_be32(in_param & 0xfffffffful), dev->hcr + 1 * 4); in mthca_cmd_post_hcr()
259 __raw_writel((__force u32) cpu_to_be32(in_modifier), dev->hcr + 2 * 4); in mthca_cmd_post_hcr()
260 __raw_writel((__force u32) cpu_to_be32(out_param >> 32), dev->hcr + 3 * 4); in mthca_cmd_post_hcr()
261 __raw_writel((__force u32) cpu_to_be32(out_param & 0xfffffffful), dev->hcr + 4 * 4); in mthca_cmd_post_hcr()
262 __raw_writel((__force u32) cpu_to_be32(token << 16), dev->hcr + 5 * 4); in mthca_cmd_post_hcr()
270 op), dev->hcr + 6 * 4); in mthca_cmd_post_hcr()
367 __raw_readl(dev->hcr + HCR_OUT_PARAM_OFFSET)) << 32 | in mthca_cmd_poll()
369 __raw_readl(dev->hcr + HCR_OUT_PARAM_OFFSET + 4)); in mthca_cmd_poll()
[all …]
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| H A D | mthca_dev.h | 322 void __iomem *hcr; member
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| /linux/drivers/net/ethernet/mellanox/mlx4/ |
| H A D | cmd.c | 425 status = readl(mlx4_priv(dev)->cmd.hcr + HCR_STATUS_OFFSET); in cmd_pending()
437 u32 __iomem *hcr = cmd->hcr; in mlx4_cmd_post() local
482 __raw_writel((__force u32) cpu_to_be32(in_param >> 32), hcr + 0); in mlx4_cmd_post()
483 __raw_writel((__force u32) cpu_to_be32(in_param & 0xfffffffful), hcr + 1); in mlx4_cmd_post()
484 __raw_writel((__force u32) cpu_to_be32(in_modifier), hcr + 2); in mlx4_cmd_post()
485 __raw_writel((__force u32) cpu_to_be32(out_param >> 32), hcr + 3); in mlx4_cmd_post()
486 __raw_writel((__force u32) cpu_to_be32(out_param & 0xfffffffful), hcr + 4); in mlx4_cmd_post()
487 __raw_writel((__force u32) cpu_to_be32(token << 16), hcr + 5); in mlx4_cmd_post()
496 op), hcr + 6); in mlx4_cmd_post()
581 void __iomem *hcr = priv->cmd.hcr; in mlx4_cmd_poll() local
[all …]
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| H A D | mlx4.h | 632 void __iomem *hcr; member
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| /linux/drivers/atm/ |
| H A D | fore200e.c | 452 if (irq_posted && (readl(fore200e->regs.pca.hcr) & PCA200E_HCR_OUTFULL)) { in fore200e_pca_irq_check()
464 writel(PCA200E_HCR_CLRINTR, fore200e->regs.pca.hcr); in fore200e_pca_irq_ack()
471 writel(PCA200E_HCR_RESET, fore200e->regs.pca.hcr); in fore200e_pca_reset()
473 writel(0, fore200e->regs.pca.hcr); in fore200e_pca_reset()
491 fore200e->regs.pca.hcr = fore200e->virt_base + PCA200E_HCR_OFFSET; in fore200e_pca_map()
641 u32 hcr = fore200e->bus->read(fore200e->regs.sba.hcr) & SBA200E_HCR_STICKY; in fore200e_sba_irq_enable() local
642 fore200e->bus->write(hcr | SBA200E_HCR_INTR_ENA, fore200e->regs.sba.hcr); in fore200e_sba_irq_enable()
647 return fore200e->bus->read(fore200e->regs.sba.hcr) & SBA200E_HCR_INTR_REQ; in fore200e_sba_irq_check()
652 u32 hcr = fore200e->bus->read(fore200e->regs.sba.hcr) & SBA200E_HCR_STICKY; in fore200e_sba_irq_ack() local
653 fore200e->bus->write(hcr | SBA200E_HCR_INTR_CLR, fore200e->regs.sba.hcr); in fore200e_sba_irq_ack()
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| H A D | fore200e.h | 773 volatile u32 __iomem * hcr; /* address of host control register */ member
782 u32 __iomem *hcr; /* address of host control register */ member
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| /linux/arch/arm64/kvm/hyp/ |
| H A D | vgic-v3-sr.c | 752 u32 hcr; in __vgic_v3_bump_eoicount() local
754 hcr = read_gicreg(ICH_HCR_EL2); in __vgic_v3_bump_eoicount()
755 hcr += 1 << ICH_HCR_EOIcount_SHIFT; in __vgic_v3_bump_eoicount()
756 write_gicreg(hcr, ICH_HCR_EL2); in __vgic_v3_bump_eoicount()
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