Searched refs:h_sync_width (Results 1 – 12 of 12) sorted by relevance
59 u_int h_sync_width; member
122 vidc.h_sync_width = var->hsync_len - 8; in acornfb_set_timing()123 vidc.h_border_start = vidc.h_sync_width + var->left_margin + 8 - 12; in acornfb_set_timing()164 vidc_writel(0x81000000 | vidc.h_sync_width); in acornfb_set_timing()226 printk(KERN_DEBUG " H-sync-width : %d\n", vidc.h_sync_width); in acornfb_set_timing()
106 if (timing->h_sync_width < optc1->min_h_sync_width || in optc201_validate_timing()
268 unsigned long h_sync_width; member
78 u8 h_sync_width; /**< lower 8 bits (pixels) */ member
784 dtd->part2.h_sync_width = h_sync_len & 0xff; in psb_intel_sdvo_get_dtd_from_mode()809 mode->hsync_end = mode->hsync_start + dtd->part2.h_sync_width; in psb_intel_sdvo_get_mode_from_dtd()
1223 u32 hstart, hactive, hblank, h_sync_width, h_front_porch; in dw_dp_video_enable() local1286 h_sync_width = mode->hsync_end - mode->hsync_start; in dw_dp_video_enable()1289 FIELD_PREP(H_SYNC_WIDTH, h_sync_width) | in dw_dp_video_enable()
108 timing->h_sync_width = stream->timing.h_sync_width; in populate_dml21_timing_config_from_stream_state()
865 dtd->part2.h_sync_width = h_sync_len & 0xff; in intel_sdvo_get_dtd_from_mode()892 mode.hsync_end = mode.hsync_start + dtd->part2.h_sync_width; in intel_sdvo_get_mode_from_dtd()
752 (timing->h_sync_width % denominator == 0); in is_h_timing_divisible_by()
5532 (stream->timing.h_sync_width % 2 == 0); in is_h_timing_divisible_by_2()
6849 timing_out->h_sync_width = mode_in->hsync_end - mode_in->hsync_start; in fill_stream_properties_from_drm_display_mode()6859 timing_out->h_sync_width = mode_in->crtc_hsync_end - mode_in->crtc_hsync_start; in fill_stream_properties_from_drm_display_mode()