Searched refs:h_sync_strt_wid (Results 1 – 4 of 4) sorted by relevance
826 uint32_t *h_total_disp, uint32_t *h_sync_strt_wid, in radeon_legacy_tv_adjust_crtc_reg() argument840 tmp = *h_sync_strt_wid; in radeon_legacy_tv_adjust_crtc_reg()844 *h_sync_strt_wid = tmp; in radeon_legacy_tv_adjust_crtc_reg()
923 uint32_t *h_total_disp, uint32_t *h_sync_strt_wid,
684 crtc->h_sync_strt_wid = aty_ld_le32(CRTC_H_SYNC_STRT_WID, par); in aty_get_crtc()735 (crtc->h_sync_strt_wid & 0x200000) ? 'N' : 'P', in aty_set_crtc()740 DPRINTK("CRTC_H_SYNC_STRT_WID: %x\n", crtc->h_sync_strt_wid); in aty_set_crtc()748 aty_st_le32(CRTC_H_SYNC_STRT_WID, crtc->h_sync_strt_wid, par); in aty_set_crtc()1032 crtc->h_sync_strt_wid = (h_sync_strt & 0xff) | (h_sync_dly << 8) | in aty_var_to_crtc()1153 crtc->shadow_h_sync_strt_wid = crtc->h_sync_strt_wid; in aty_var_to_crtc()1181 h_sync_strt = (crtc->h_sync_strt_wid & 0xff) | ((crtc->h_sync_strt_wid >> 4) & 0x100); in aty_crtc_to_var()1182 h_sync_dly = (crtc->h_sync_strt_wid >> 8) & 0x7; in aty_crtc_to_var()1183 h_sync_wid = (crtc->h_sync_strt_wid >> 16) & 0x1f; in aty_crtc_to_var()1184 h_sync_pol = (crtc->h_sync_strt_wid >> 21) & 0x1; in aty_crtc_to_var()[all …]
21 u32 h_sync_strt_wid; member