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Searched refs:gws_base (Results 1 – 12 of 12) sorted by relevance

/linux/drivers/gpu/drm/amd/include/
H A Dmes_v11_api_def.h299 uint32_t gws_base; member
574 uint32_t gws_base; member
603 uint32_t gws_base; member
/linux/drivers/gpu/drm/amd/amdgpu/
H A Damdgpu_ib.c247 job->gds_size, job->gws_base, in amdgpu_ib_schedule()
H A Damdgpu_mes.h271 uint32_t gws_base; member
H A Dmes_v11_0.c362 mes_add_queue_pkt.gws_base = input->gws_base; in mes_v11_0_add_hw_queue()
H A Dmes_v12_1.c326 mes_add_queue_pkt.gws_base = input->gws_base; in mes_v12_1_add_hw_queue()
H A Dmes_v12_0.c341 mes_add_queue_pkt.gws_base = input->gws_base; in mes_v12_0_add_hw_queue()
H A Dgfx_v9_4_3.c2595 uint32_t gws_base, uint32_t gws_size, in gfx_v9_4_3_ring_emit_gds_switch() argument
2613 gws_size << GDS_GWS_VMID0__SIZE__SHIFT | gws_base); in gfx_v9_4_3_ring_emit_gds_switch()
H A Damdgpu_vm.c872 job->gds_size, job->gws_base, in amdgpu_vm_flush()
H A Dgfx_v8_0.c5030 uint32_t gws_base, uint32_t gws_size, in gfx_v8_0_ring_emit_gds_switch() argument
5055 amdgpu_ring_write(ring, gws_size << GDS_GWS_VMID0__SIZE__SHIFT | gws_base); in gfx_v8_0_ring_emit_gds_switch()
H A Dgfx_v9_0.c4375 uint32_t gws_base, uint32_t gws_size, in gfx_v9_0_ring_emit_gds_switch() argument
4393 gws_size << GDS_GWS_VMID0__SIZE__SHIFT | gws_base); in gfx_v9_0_ring_emit_gds_switch()
H A Dgfx_v11_0.c5351 uint32_t gws_base, uint32_t gws_size, in gfx_v11_0_ring_emit_gds_switch()
5369 gws_size << GDS_GWS_VMID0__SIZE__SHIFT | gws_base); in gfx_v11_0_ring_emit_gds_switch()
5349 gfx_v11_0_ring_emit_gds_switch(struct amdgpu_ring * ring,uint32_t vmid,uint32_t gds_base,uint32_t gds_size,uint32_t gws_base,uint32_t gws_size,uint32_t oa_base,uint32_t oa_size) gfx_v11_0_ring_emit_gds_switch() argument
H A Dgfx_v10_0.c7798 uint32_t gws_base, uint32_t gws_size, in gfx_v10_0_ring_emit_gds_switch() argument
7816 gws_size << GDS_GWS_VMID0__SIZE__SHIFT | gws_base); in gfx_v10_0_ring_emit_gds_switch()