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Searched refs:gvt_dbg_core (Results 1 – 7 of 7) sorted by relevance

/linux/drivers/gpu/drm/i915/gvt/
H A Dvgpu.c71 gvt_dbg_core("Populate PVINFO PAGE for vGPU %d\n", vgpu->id); in populate_pvinfo_page()
72 gvt_dbg_core("aperture base [GMADR] 0x%llx size 0x%llx\n", in populate_pvinfo_page()
74 gvt_dbg_core("hidden base [GMADR] 0x%llx size=0x%llx\n", in populate_pvinfo_page()
76 gvt_dbg_core("fence size %d\n", vgpu_fence_sz(vgpu)); in populate_pvinfo_page()
136 gvt_dbg_core("type[%d]: %s avail %u low %u high %u fence %u weight %u res %s\n", in intel_gvt_init_vgpu_types()
321 gvt_dbg_core("low %u MB high %u MB fence %u\n", in intel_gvt_create_vgpu()
444 gvt_dbg_core("------------------------------------------\n"); in intel_gvt_reset_vgpu_locked()
445 gvt_dbg_core("resseting vgpu%d, dmlr %d, engine_mask %08x\n", in intel_gvt_reset_vgpu_locked()
497 gvt_dbg_core("reset vgpu%d done\n", vgpu->id); in intel_gvt_reset_vgpu_locked()
498 gvt_dbg_core("------------------------------------------\n"); in intel_gvt_reset_vgpu_locked()
H A Ddebug.h38 #define gvt_dbg_core(fmt, args...) \ macro
H A Dkvmgt.c1204 gvt_dbg_core("get region info bar:%d\n", info->index); in intel_vgpu_ioctl_get_region_info()
1213 gvt_dbg_core("get region info index:%d\n", info->index); in intel_vgpu_ioctl_get_region_info()
1265 gvt_dbg_core("vgpu%d ioctl, cmd: %d\n", vgpu->id, cmd); in intel_vgpu_ioctl()
1474 gvt_dbg_core("intel_vgpu_create succeeded for mdev: %s\n", in intel_vgpu_probe()
1737 gvt_dbg_core("service thread start\n"); in gvt_service_thread()
1836 gvt_dbg_core("init gvt device\n"); in intel_gvt_init_device()
1901 gvt_dbg_core("gvt device initialization is done\n"); in intel_gvt_init_device()
H A Dsched_policy.c430 gvt_dbg_core("vgpu%d: start schedule\n", vgpu->id); in intel_vgpu_start_schedule()
456 gvt_dbg_core("vgpu%d: stop schedule\n", vgpu->id); in intel_vgpu_stop_schedule()
H A Ddmabuf.c235 gvt_dbg_core("invalid drm_format_mod %llx for tiling\n", in vgpu_create_gem()
H A Dhandlers.c241 gvt_dbg_core("vgpu%d: ips enabled\n", vgpu->id); in gamw_echo_dev_rw_ia_write()
243 gvt_dbg_core("vgpu%d: ips disabled\n", vgpu->id); in gamw_echo_dev_rw_ia_write()
1375 gvt_dbg_core("vgpu%d: %s VGA mode\n", vgpu->id, in vga_control_mmio_write()
1751 gvt_dbg_core("VM(%d) write %x to mailbox, return data0 %x\n", in mailbox_write()
2082 gvt_dbg_core("EXECLIST %s on ring %s\n", in ring_mode_mmio_write()
H A Dgtt.c2065 gvt_dbg_core("GMA 0x%lx is not present\n", gma); in intel_vgpu_gma_to_gpa()
2634 gvt_dbg_core("init gtt\n"); in intel_gvt_init_gtt()