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Searched refs:gtt_offset (Results 1 – 6 of 6) sorted by relevance

/linux/drivers/gpu/drm/i915/gt/
H A Dgen8_engine_cs.h92 gen8_emit_ggtt_write_rcs(u32 *cs, u32 value, u32 gtt_offset, u32 flags) in gen8_emit_ggtt_write_rcs() argument
95 GEM_BUG_ON(!IS_ALIGNED(gtt_offset, 8)); in gen8_emit_ggtt_write_rcs()
99 gtt_offset, in gen8_emit_ggtt_write_rcs()
105 gen12_emit_ggtt_write_rcs(u32 *cs, u32 value, u32 gtt_offset, u32 flags0, u32 flags1) in gen12_emit_ggtt_write_rcs() argument
108 GEM_BUG_ON(!IS_ALIGNED(gtt_offset, 8)); in gen12_emit_ggtt_write_rcs()
112 gtt_offset, in gen12_emit_ggtt_write_rcs()
118 __gen8_emit_flush_dw(u32 *cs, u32 value, u32 gtt_offset, u32 flags) in __gen8_emit_flush_dw() argument
121 *cs++ = gtt_offset; in __gen8_emit_flush_dw()
129 gen8_emit_ggtt_write(u32 *cs, u32 value, u32 gtt_offset, u32 flags) in gen8_emit_ggtt_write() argument
132 GEM_BUG_ON(gtt_offset & (1 << 5)); in gen8_emit_ggtt_write()
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/linux/drivers/gpu/drm/i915/
H A Di915_vma.c1086 unsigned int *gtt_offset) in remap_tiled_color_plane_pages() argument
1134 *gtt_offset += alignment_pad + dst_stride * height; in remap_tiled_color_plane_pages()
1177 unsigned int *gtt_offset) in remap_linear_color_plane_pages() argument
1188 *gtt_offset += alignment_pad + size; in remap_linear_color_plane_pages()
1198 unsigned int *gtt_offset) in remap_color_plane_pages() argument
1203 alignment_pad = ALIGN(*gtt_offset, rem_info->plane_alignment) - *gtt_offset; in remap_color_plane_pages()
1211 gtt_offset); in remap_color_plane_pages()
1222 gtt_offset); in remap_color_plane_pages()
1235 unsigned int gtt_offset = 0; in intel_remap_pages() local
1252 sg = remap_color_plane_pages(rem_info, obj, i, st, sg, &gtt_offset); in intel_remap_pages()
H A Di915_perf.c545 u32 gtt_offset = i915_ggtt_offset(stream->oa_buffer.vma); in oa_buffer_check_unlocked() local
560 hw_tail -= gtt_offset; in oa_buffer_check_unlocked()
736 u32 gtt_offset = i915_ggtt_offset(stream->oa_buffer.vma); in gen8_append_oa_reports() local
918 (head + gtt_offset) & GEN12_OAG_OAHEADPTR_MASK); in gen8_append_oa_reports()
1046 u32 gtt_offset = i915_ggtt_offset(stream->oa_buffer.vma); in gen7_append_oa_reports() local
1126 ((head + gtt_offset) & GEN7_OASTATUS2_HEAD_MASK) | in gen7_append_oa_reports()
1703 u32 gtt_offset = i915_ggtt_offset(stream->oa_buffer.vma); in gen7_init_oa_buffer() local
1712 gtt_offset | GEN7_OASTATUS2_MEM_SELECT_GGTT); in gen7_init_oa_buffer()
1715 intel_uncore_write(uncore, GEN7_OABUFFER, gtt_offset); in gen7_init_oa_buffer()
1718 gtt_offset | OABUFFER_SIZE_16M); in gen7_init_oa_buffer()
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H A Di915_gpu_error.c555 u64 start = batch->gtt_offset; in error_print_engine()
625 upper_32_bits(vma->gtt_offset), in intel_gpu_error_print_vma()
626 lower_32_bits(vma->gtt_offset)); in intel_gpu_error_print_vma()
1171 dst->gtt_offset = vma_res->start; in i915_vma_coredump_create()
/linux/drivers/gpu/drm/i915/display/
H A Dintel_fb.c1486 u32 obj_offset, u32 gtt_offset, int x, int y, in calc_plane_remap_info() argument
1546 u32 aligned_offset = ALIGN(gtt_offset, in calc_plane_remap_info()
1549 size += aligned_offset - gtt_offset; in calc_plane_remap_info()
1550 gtt_offset = aligned_offset; in calc_plane_remap_info()
1599 gtt_offset * tile_size, 0); in calc_plane_remap_info()
1604 gtt_offset * tile_size, 0); in calc_plane_remap_info()
1842 u32 gtt_offset = 0; in intel_plane_remap_gtt() local
1889 gtt_offset += calc_plane_remap_info(intel_fb, i, &view_dims, in intel_plane_remap_gtt()
1890 offset, gtt_offset, x, y, in intel_plane_remap_gtt()
/linux/drivers/gpu/drm/xe/
H A Dxe_oa.c246 u32 gtt_offset = xe_bo_ggtt_addr(stream->oa_buffer.bo); in xe_oa_buffer_check_unlocked() local
254 hw_tail -= gtt_offset; in xe_oa_buffer_check_unlocked()
351 u32 gtt_offset = xe_bo_ggtt_addr(stream->oa_buffer.bo); in xe_oa_append_reports() local
396 (head + gtt_offset) & OAG_OAHEADPTR_MASK); in xe_oa_append_reports()
406 u32 gtt_offset = xe_bo_ggtt_addr(stream->oa_buffer.bo); in xe_oa_init_oa_buffer() local
408 u32 oa_buf = gtt_offset | OAG_OABUFFER_MEMORY_SELECT; in xe_oa_init_oa_buffer()
423 gtt_offset & OAG_OAHEADPTR_MASK); in xe_oa_init_oa_buffer()
431 gtt_offset & OAG_OATAILPTR_MASK); in xe_oa_init_oa_buffer()