/linux/drivers/gpu/drm/i915/gt/ |
H A D | gen8_engine_cs.h | 92 gen8_emit_ggtt_write_rcs(u32 *cs, u32 value, u32 gtt_offset, u32 flags) in gen8_emit_ggtt_write_rcs() argument 95 GEM_BUG_ON(!IS_ALIGNED(gtt_offset, 8)); in gen8_emit_ggtt_write_rcs() 99 gtt_offset, in gen8_emit_ggtt_write_rcs() 105 gen12_emit_ggtt_write_rcs(u32 *cs, u32 value, u32 gtt_offset, u32 flags0, u32 flags1) in gen12_emit_ggtt_write_rcs() argument 108 GEM_BUG_ON(!IS_ALIGNED(gtt_offset, 8)); in gen12_emit_ggtt_write_rcs() 112 gtt_offset, in gen12_emit_ggtt_write_rcs() 118 __gen8_emit_flush_dw(u32 *cs, u32 value, u32 gtt_offset, u32 flags) in __gen8_emit_flush_dw() argument 121 *cs++ = gtt_offset; in __gen8_emit_flush_dw() 129 gen8_emit_ggtt_write(u32 *cs, u32 value, u32 gtt_offset, u32 flags) in gen8_emit_ggtt_write() argument 132 GEM_BUG_ON(gtt_offset & (1 << 5)); in gen8_emit_ggtt_write() [all …]
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/linux/drivers/gpu/drm/i915/ |
H A D | i915_vma.c | 1084 unsigned int *gtt_offset) in remap_tiled_color_plane_pages() argument 1132 *gtt_offset += alignment_pad + dst_stride * height; in remap_tiled_color_plane_pages() 1175 unsigned int *gtt_offset) in remap_linear_color_plane_pages() argument 1186 *gtt_offset += alignment_pad + size; in remap_linear_color_plane_pages() 1196 unsigned int *gtt_offset) in remap_color_plane_pages() argument 1201 alignment_pad = ALIGN(*gtt_offset, rem_info->plane_alignment) - *gtt_offset; in remap_color_plane_pages() 1209 gtt_offset); in remap_color_plane_pages() 1220 gtt_offset); in remap_color_plane_pages() 1233 unsigned int gtt_offset = 0; in intel_remap_pages() local 1250 sg = remap_color_plane_pages(rem_info, obj, i, st, sg, >t_offset); in intel_remap_pages()
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H A D | i915_perf.c | 544 u32 gtt_offset = i915_ggtt_offset(stream->oa_buffer.vma); in oa_buffer_check_unlocked() local 558 hw_tail -= gtt_offset; in oa_buffer_check_unlocked() 732 u32 gtt_offset = i915_ggtt_offset(stream->oa_buffer.vma); in gen8_append_oa_reports() local 914 (head + gtt_offset) & GEN12_OAG_OAHEADPTR_MASK); in gen8_append_oa_reports() 1042 u32 gtt_offset = i915_ggtt_offset(stream->oa_buffer.vma); in gen7_append_oa_reports() local 1122 ((head + gtt_offset) & GEN7_OASTATUS2_HEAD_MASK) | in gen7_append_oa_reports() 1699 u32 gtt_offset = i915_ggtt_offset(stream->oa_buffer.vma); in gen7_init_oa_buffer() local 1708 gtt_offset | GEN7_OASTATUS2_MEM_SELECT_GGTT); in gen7_init_oa_buffer() 1711 intel_uncore_write(uncore, GEN7_OABUFFER, gtt_offset); in gen7_init_oa_buffer() 1714 gtt_offset | OABUFFER_SIZE_16M); in gen7_init_oa_buffer() [all …]
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H A D | i915_gpu_error.h | 41 u64 gtt_offset; member
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H A D | i915_gpu_error.c | 556 u64 start = batch->gtt_offset; in error_print_engine() 626 upper_32_bits(vma->gtt_offset), in intel_gpu_error_print_vma() 627 lower_32_bits(vma->gtt_offset)); in intel_gpu_error_print_vma() 1119 dst->gtt_offset = vma_res->start; in i915_vma_coredump_create()
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/linux/drivers/gpu/drm/i915/display/ |
H A D | intel_fb.c | 1374 u32 obj_offset, u32 gtt_offset, int x, int y, in calc_plane_remap_info() 1434 u32 aligned_offset = ALIGN(gtt_offset, in calc_plane_remap_info() 1437 size += aligned_offset - gtt_offset; in calc_plane_remap_info() 1438 gtt_offset = aligned_offset; in calc_plane_remap_info() 1487 gtt_offset * tile_size, 0); in intel_fb_view_init() 1492 gtt_offset * tile_size, 0); in intel_fb_view_init() 1666 u32 gtt_offset = 0; in intel_plane_remap_gtt() 1713 gtt_offset += calc_plane_remap_info(intel_fb, i, &view_dims, 1714 offset, gtt_offset, x, y, in intel_fb_stride_alignment() 1338 calc_plane_remap_info(const struct intel_framebuffer * fb,int color_plane,const struct fb_plane_view_dims * dims,u32 obj_offset,u32 gtt_offset,int x,int y,struct intel_fb_view * view) calc_plane_remap_info() argument 1630 u32 gtt_offset = 0; intel_plane_remap_gtt() local
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/linux/drivers/gpu/drm/xe/ |
H A D | xe_oa.c | 216 u32 gtt_offset = xe_bo_ggtt_addr(stream->oa_buffer.bo); in xe_oa_buffer_check_unlocked() local 226 hw_tail -= gtt_offset; in xe_oa_buffer_check_unlocked() 325 u32 gtt_offset = xe_bo_ggtt_addr(stream->oa_buffer.bo); in xe_oa_append_reports() local 370 (head + gtt_offset) & OAG_OAHEADPTR_MASK); in xe_oa_append_reports() 380 u32 gtt_offset = xe_bo_ggtt_addr(stream->oa_buffer.bo); in xe_oa_init_oa_buffer() local 381 u32 oa_buf = gtt_offset | OABUFFER_SIZE_16M | OAG_OABUFFER_MEMORY_SELECT; in xe_oa_init_oa_buffer() 388 gtt_offset & OAG_OAHEADPTR_MASK); in xe_oa_init_oa_buffer() 396 gtt_offset & OAG_OATAILPTR_MASK); in xe_oa_init_oa_buffer()
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