| /linux/drivers/gpu/drm/amd/display/dc/hubbub/dcn20/ |
| H A D | dcn20_hubbub.c | 285 output->grph.rgb.max_uncompressed_blk_size = 256; in hubbub2_get_dcc_compression_cap()
286 output->grph.rgb.max_compressed_blk_size = 256; in hubbub2_get_dcc_compression_cap()
287 output->grph.rgb.independent_64b_blks = false; in hubbub2_get_dcc_compression_cap()
290 output->grph.rgb.max_uncompressed_blk_size = 128; in hubbub2_get_dcc_compression_cap()
291 output->grph.rgb.max_compressed_blk_size = 128; in hubbub2_get_dcc_compression_cap()
292 output->grph.rgb.independent_64b_blks = false; in hubbub2_get_dcc_compression_cap()
295 output->grph.rgb.max_uncompressed_blk_size = 256; in hubbub2_get_dcc_compression_cap()
296 output->grph.rgb.max_compressed_blk_size = 64; in hubbub2_get_dcc_compression_cap()
297 output->grph.rgb.independent_64b_blks = true; in hubbub2_get_dcc_compression_cap()
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| /linux/drivers/gpu/drm/amd/display/dc/hubp/dcn10/ |
| H A D | dcn10_hubp.c | 388 if (address->grph.addr.quad_part == 0) in hubp1_program_surface_flip_and_addr()
395 if (address->grph.meta_addr.quad_part != 0) { in hubp1_program_surface_flip_and_addr()
398 address->grph.meta_addr.high_part); in hubp1_program_surface_flip_and_addr()
402 address->grph.meta_addr.low_part); in hubp1_program_surface_flip_and_addr()
407 address->grph.addr.high_part); in hubp1_program_surface_flip_and_addr()
411 address->grph.addr.low_part); in hubp1_program_surface_flip_and_addr()
765 SURFACE_EARLIEST_INUSE_ADDRESS, &earliest_inuse_address.grph.addr.low_part); in hubp1_is_flip_pending()
768 SURFACE_EARLIEST_INUSE_ADDRESS_HIGH, &earliest_inuse_address.grph.addr.high_part); in hubp1_is_flip_pending()
774 earliest_inuse_address.grph.addr.quad_part != hubp->request_address.grph.addr.quad_part) in hubp1_is_flip_pending()
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| /linux/drivers/gpu/drm/amd/display/dc/hubp/dcn30/ |
| H A D | dcn30_hubp.c | 108 if (address->grph.addr.quad_part == 0) in hubp3_program_surface_flip_and_addr()
115 if (address->grph.meta_addr.quad_part != 0) { in hubp3_program_surface_flip_and_addr()
118 address->grph.meta_addr.high_part); in hubp3_program_surface_flip_and_addr()
122 address->grph.meta_addr.low_part); in hubp3_program_surface_flip_and_addr()
127 address->grph.addr.high_part); in hubp3_program_surface_flip_and_addr()
131 address->grph.addr.low_part); in hubp3_program_surface_flip_and_addr()
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| /linux/drivers/gpu/drm/amd/display/dc/hubp/dcn20/ |
| H A D | dcn20_hubp.c | 758 if (address->grph.addr.quad_part == 0) in hubp2_program_surface_flip_and_addr()
765 if (address->grph.meta_addr.quad_part != 0) { in hubp2_program_surface_flip_and_addr()
768 address->grph.meta_addr.high_part); in hubp2_program_surface_flip_and_addr()
772 address->grph.meta_addr.low_part); in hubp2_program_surface_flip_and_addr()
777 address->grph.addr.high_part); in hubp2_program_surface_flip_and_addr()
781 address->grph.addr.low_part); in hubp2_program_surface_flip_and_addr()
938 SURFACE_EARLIEST_INUSE_ADDRESS, &earliest_inuse_address.grph.addr.low_part); in hubp2_is_flip_pending()
941 SURFACE_EARLIEST_INUSE_ADDRESS_HIGH, &earliest_inuse_address.grph.addr.high_part); in hubp2_is_flip_pending()
947 earliest_inuse_address.grph.addr.quad_part != hubp->request_address.grph.addr.quad_part) in hubp2_is_flip_pending()
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| /linux/drivers/gpu/drm/amd/display/dc/hubbub/dcn401/ |
| H A D | dcn401_hubbub.c | 977 output->grph.rgb.dcc_controls.dcc_256_256 = 1; in hubbub401_get_dcc_compression_cap()
978 output->grph.rgb.dcc_controls.dcc_256_128 = 1; in hubbub401_get_dcc_compression_cap()
979 output->grph.rgb.dcc_controls.dcc_256_64 = 1; in hubbub401_get_dcc_compression_cap()
982 output->grph.rgb.dcc_controls.dcc_256_128 = 1; in hubbub401_get_dcc_compression_cap()
983 output->grph.rgb.dcc_controls.dcc_256_64 = 1; in hubbub401_get_dcc_compression_cap()
986 output->grph.rgb.dcc_controls.dcc_256_64 = 1; in hubbub401_get_dcc_compression_cap()
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| /linux/drivers/gpu/drm/amd/display/dc/hwss/dcn201/ |
| H A D | dcn201_hwseq.c | 115 gpu_addr_to_uma(hwseq, &addr->grph.addr); in plane_address_in_gpu_space_to_uma()
116 gpu_addr_to_uma(hwseq, &addr->grph.meta_addr); in plane_address_in_gpu_space_to_uma()
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| /linux/drivers/gpu/drm/amd/display/dc/hubp/dcn401/ |
| H A D | dcn401_hubp.c | 442 if (address->grph.addr.quad_part == 0) in hubp401_program_surface_flip_and_addr()
450 address->grph.addr.high_part); in hubp401_program_surface_flip_and_addr()
454 address->grph.addr.low_part); in hubp401_program_surface_flip_and_addr()
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| /linux/drivers/gpu/drm/amd/display/amdgpu_dm/ |
| H A D | amdgpu_dm_plane.c | 305 output.grph.rgb.independent_64b_blks != 0) in amdgpu_dm_plane_validate_dcc()
351 address->grph.meta_addr.low_part = lower_32_bits(dcc_address); in amdgpu_dm_plane_fill_gfx9_plane_attributes_from_modifiers()
352 address->grph.meta_addr.high_part = upper_32_bits(dcc_address); in amdgpu_dm_plane_fill_gfx9_plane_attributes_from_modifiers()
871 address->grph.addr.low_part = lower_32_bits(addr); in amdgpu_dm_plane_fill_plane_buffer_attributes()
872 address->grph.addr.high_part = upper_32_bits(addr); in amdgpu_dm_plane_fill_plane_buffer_attributes()
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| H A D | amdgpu_dm.c | 10124 bundle->flip_addrs[planes_count].address.grph.addr.high_part, in amdgpu_dm_commit_planes()
10125 bundle->flip_addrs[planes_count].address.grph.addr.low_part); in amdgpu_dm_commit_planes()
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| /linux/drivers/gpu/drm/amd/display/dc/dce/ |
| H A D | dce_mem_input.c | 871 if (address->grph.addr.quad_part == 0) in dce_mi_program_surface_flip_and_addr()
873 program_pri_addr(dce_mi, address->grph.addr); in dce_mi_program_surface_flip_and_addr()
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| /linux/drivers/gpu/drm/amd/display/dc/ |
| H A D | dc_hw_types.h | 78 } grph; member
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| H A D | dc_dmub_srv.c | 1996 if (address->grph.addr.quad_part == 0) { in dc_dmub_srv_fams2_passthrough_flip()
2002 address->grph.meta_addr.low_part; in dc_dmub_srv_fams2_passthrough_flip()
2004 (uint16_t)address->grph.meta_addr.high_part; in dc_dmub_srv_fams2_passthrough_flip()
2006 address->grph.addr.low_part; in dc_dmub_srv_fams2_passthrough_flip()
2008 (uint16_t)address->grph.addr.high_part; in dc_dmub_srv_fams2_passthrough_flip()
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| H A D | dc.h | 420 } grph; member
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| /linux/drivers/gpu/drm/amd/display/dc/hwss/dcn30/ |
| H A D | dcn30_hwseq.c | 955 plane->address.grph.cursor_cache_addr.quad_part; in dcn30_apply_idle_power_optimizations()
1063 (plane->address.grph.cursor_cache_addr.quad_part + 2047) & ~2047; in dcn30_apply_idle_power_optimizations()
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| /linux/drivers/gpu/drm/amd/display/dc/dce110/ |
| H A D | dce110_mem_input_v.c | 136 addr->grph.addr); in program_addr()
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| /linux/drivers/gpu/drm/amd/display/dc/hwss/dce110/ |
| H A D | dce110_hwseq.c | 2990 pipe_ctx->plane_state->address.grph.addr.high_part, in dce110_program_front_end_for_pipe()
2991 pipe_ctx->plane_state->address.grph.addr.low_part, in dce110_program_front_end_for_pipe()
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| /linux/drivers/gpu/drm/amd/display/dc/core/ |
| H A D | dc.c | 6669 state->hubp[i].primary_surface_address_low = pipe_ctx->plane_state->address.grph.addr.low_part; in dc_capture_register_software_state()
6670 state->hubp[i].primary_surface_address_high = pipe_ctx->plane_state->address.grph.addr.high_part; in dc_capture_register_software_state()
6671 …state->hubp[i].primary_meta_surface_address_low = pipe_ctx->plane_state->address.grph.meta_addr.lo… in dc_capture_register_software_state()
6672 …state->hubp[i].primary_meta_surface_address_high = pipe_ctx->plane_state->address.grph.meta_addr.h… in dc_capture_register_software_state()
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