Searched refs:gpu_mem_params (Results 1 – 3 of 3) sorted by relevance
477 switch (mcm_luts.lut3d_data.gpu_mem_params.size) { in dcn401_populate_mcm_luts()500 hubp->funcs->hubp_program_3dlut_fl_addr(hubp, mcm_luts.lut3d_data.gpu_mem_params.addr); in dcn401_populate_mcm_luts()503 mpc->funcs->mcm.program_bit_depth(mpc, mcm_luts.lut3d_data.gpu_mem_params.bit_depth, mpcc_id); in dcn401_populate_mcm_luts()505 switch (mcm_luts.lut3d_data.gpu_mem_params.layout) { in dcn401_populate_mcm_luts()529 switch (mcm_luts.lut3d_data.gpu_mem_params.format_params.format) { in dcn401_populate_mcm_luts()545 mcm_luts.lut3d_data.gpu_mem_params.format_params.float_params.bias, in dcn401_populate_mcm_luts()546 mcm_luts.lut3d_data.gpu_mem_params.format_params.float_params.scale, in dcn401_populate_mcm_luts()549 mcm_luts.lut3d_data.gpu_mem_params.format_params.float_params.bias, in dcn401_populate_mcm_luts()550 mcm_luts.lut3d_data.gpu_mem_params.format_params.float_params.scale); in dcn401_populate_mcm_luts()555 switch (mcm_luts.lut3d_data.gpu_mem_params.component_order) { in dcn401_populate_mcm_luts()
1312 struct dc_cm2_gpu_mem_parameters gpu_mem_params; member
950 switch (plane_state->mcm_luts.lut3d_data.gpu_mem_params.layout) { in populate_dml21_plane_config_from_plane_state()960 switch (plane_state->mcm_luts.lut3d_data.gpu_mem_params.size) { in populate_dml21_plane_config_from_plane_state()