Searched refs:global_ctrl (Results 1 – 8 of 8) sorted by relevance
273 u32 global_ctrl; in disable_hdm() local277 global_ctrl = readl(hdm + CXL_HDM_DECODER_CTRL_OFFSET); in disable_hdm()278 writel(global_ctrl & ~CXL_HDM_DECODER_ENABLE, in disable_hdm()285 u32 global_ctrl; in devm_cxl_enable_hdm() local287 global_ctrl = readl(hdm + CXL_HDM_DECODER_CTRL_OFFSET); in devm_cxl_enable_hdm()288 writel(global_ctrl | CXL_HDM_DECODER_ENABLE, in devm_cxl_enable_hdm()407 u32 global_ctrl = 0; in cxl_hdm_decode_init() local410 global_ctrl = readl(hdm + CXL_HDM_DECODER_CTRL_OFFSET); in cxl_hdm_decode_init()416 if (global_ctrl & CXL_HDM_DECODER_ENABLE || (!hdm && info->mem_enabled)) in cxl_hdm_decode_init()
290 uint64_t global_ctrl; member
260 return test_bit(pmc->idx, (unsigned long *)&pmu->global_ctrl); in pmc_is_globally_enabled()
221 reg = &ctxt->global_ctrl; in xen_intel_pmu_emulate()
4283 int global_ctrl, pebs_enable; in intel_guest_get_msrs() local4291 global_ctrl = (*nr)++; in intel_guest_get_msrs()4292 arr[global_ctrl] = (struct perf_guest_switch_msr){ in intel_guest_get_msrs()4348 arr[global_ctrl].guest &= ~kvm_pmu->host_cross_mapped_mask; in intel_guest_get_msrs()4350 arr[global_ctrl].guest |= arr[pebs_enable].guest; in intel_guest_get_msrs()
556 u64 global_ctrl; member
7202 if (pmu->pebs_enable & pmu->global_ctrl) in atomic_switch_perf_msrs()