Searched refs:global_ctrl (Results 1 – 5 of 5) sorted by relevance
242 u32 global_ctrl; in disable_hdm() local246 global_ctrl = readl(hdm + CXL_HDM_DECODER_CTRL_OFFSET); in disable_hdm()247 writel(global_ctrl & ~CXL_HDM_DECODER_ENABLE, in disable_hdm()254 u32 global_ctrl; in devm_cxl_enable_hdm() local256 global_ctrl = readl(hdm + CXL_HDM_DECODER_CTRL_OFFSET); in devm_cxl_enable_hdm()257 writel(global_ctrl | CXL_HDM_DECODER_ENABLE, in devm_cxl_enable_hdm()376 u32 global_ctrl = 0; in cxl_hdm_decode_init() local379 global_ctrl = readl(hdm + CXL_HDM_DECODER_CTRL_OFFSET); in cxl_hdm_decode_init()385 if (global_ctrl & CXL_HDM_DECODER_ENABLE || (!hdm && info->mem_enabled)) in cxl_hdm_decode_init()
531 u64 global_ctrl = rdmsr(MSR_CORE_PERF_GLOBAL_CTRL); in guest_test_fixed_counters() 534 GUEST_ASSERT_EQ(global_ctrl, GENMASK_ULL(nr_gp_counters - 1, 0)); in guest_test_fixed_counters() 536 GUEST_ASSERT_EQ(global_ctrl, 0); in guest_test_fixed_counters() 480 u64 global_ctrl = rdmsr(MSR_CORE_PERF_GLOBAL_CTRL); guest_test_gp_counters() local
5306 int global_ctrl; in intel_guest_get_msrs() 5316 global_ctrl = (*nr)++; in intel_guest_get_msrs() 5317 arr[global_ctrl] = (struct perf_guest_switch_msr){ in intel_guest_get_msrs() 5404 arr[global_ctrl].guest |= guest_pebs_mask; in core_pmu_enable_all() 5295 int global_ctrl, pebs_enable; intel_guest_get_msrs() local
7367 if (pmu->pebs_enable & pmu->global_ctrl) in atomic_switch_perf_msrs()7398 pmu->global_ctrl = vmx->msr_autostore.val[slot].value; in vmx_refresh_guest_perf_global_control()7399 vmcs_write64(GUEST_IA32_PERF_GLOBAL_CTRL, pmu->global_ctrl); in vmx_refresh_guest_perf_global_control()7403 pmu->global_ctrl = vmcs_read64(GUEST_IA32_PERF_GLOBAL_CTRL); in vmx_refresh_guest_perf_global_control()
4633 vcpu_to_pmu(vcpu)->global_ctrl); in svm_vcpu_run()