Searched refs:gfx_info (Results 1 – 6 of 6) sorted by relevance
105 struct amdgpu_gfx_config *gfx_info = &mm->dev->adev->gfx.config; in mqd_symmetrically_map_cu_mask() local122 if (gfx_info->max_shader_engines > KFD_MAX_NUM_SE) { in mqd_symmetrically_map_cu_mask()125 gfx_info->max_shader_engines); in mqd_symmetrically_map_cu_mask()128 if (gfx_info->max_sh_per_se > KFD_MAX_NUM_SH_PER_SE) { in mqd_symmetrically_map_cu_mask()131 gfx_info->max_sh_per_se * gfx_info->max_shader_engines); in mqd_symmetrically_map_cu_mask()149 for (se = 0; se < gfx_info->max_shader_engines; se++) in mqd_symmetrically_map_cu_mask()150 for (sh = 0; sh < gfx_info->max_sh_per_se; sh++) in mqd_symmetrically_map_cu_mask()191 for (i = 0; i < gfx_info->max_shader_engines; i++) in mqd_symmetrically_map_cu_mask()196 for (sh = 0; sh < gfx_info->max_sh_per_se; sh++) { in mqd_symmetrically_map_cu_mask()197 for (se = 0; se < gfx_info->max_shader_engines; se++) { in mqd_symmetrically_map_cu_mask()
1680 struct amdgpu_gfx_config *gfx_info, in fill_in_l2_l3_pcache() argument1700 for (i = 0; i < gfx_info->max_shader_engines && !found; i++) { in fill_in_l2_l3_pcache()1701 for (j = 0; j < gfx_info->max_sh_per_se && !found; j++) { in fill_in_l2_l3_pcache()1757 for (i = 0; i < gfx_info->max_shader_engines; i++) { in fill_in_l2_l3_pcache()1758 for (j = 0; j < gfx_info->max_sh_per_se; j++) { in fill_in_l2_l3_pcache()1791 struct amdgpu_gfx_config *gfx_info = &kdev->adev->gfx.config; in kfd_fill_cache_non_crat_info() local1825 for (i = 0; i < gfx_info->max_shader_engines; i++) { in kfd_fill_cache_non_crat_info()1826 for (j = 0; j < gfx_info->max_sh_per_se; j++) { in kfd_fill_cache_non_crat_info()1827 for (k = 0; k < gfx_info->max_cu_per_sh; k += pcache_info[ct].num_cu_shared) { in kfd_fill_cache_non_crat_info()1843 gfx_info->max_cu_per_sh) ? in kfd_fill_cache_non_crat_info()[all …]
2239 struct amdgpu_gfx_config *gfx_info = &kdev->adev->gfx.config; in kfd_create_vcrat_image_gpu() local2288 cu->array_count = gfx_info->max_sh_per_se * in kfd_create_vcrat_image_gpu()2289 gfx_info->max_shader_engines; in kfd_create_vcrat_image_gpu()2290 total_num_of_cu = (cu->array_count * gfx_info->max_cu_per_sh); in kfd_create_vcrat_image_gpu()2292 cu->num_cu_per_array = gfx_info->max_cu_per_sh; in kfd_create_vcrat_image_gpu()2294 cu->num_banks = gfx_info->max_shader_engines; in kfd_create_vcrat_image_gpu()
510 struct amdgpu_gfx_config *gfx_info = &adev->gfx.config; in amdgpu_gfx_mqd_symmetrically_map_cu_mask() local530 for (se = 0; se < gfx_info->max_shader_engines; se++) in amdgpu_gfx_mqd_symmetrically_map_cu_mask()531 for (sh = 0; sh < gfx_info->max_sh_per_se; sh++) in amdgpu_gfx_mqd_symmetrically_map_cu_mask()536 for (i = 0; i < gfx_info->max_shader_engines; i++) in amdgpu_gfx_mqd_symmetrically_map_cu_mask()541 for (sh = 0; sh < gfx_info->max_sh_per_se; sh++) { in amdgpu_gfx_mqd_symmetrically_map_cu_mask()542 for (se = 0; se < gfx_info->max_shader_engines; se++) { in amdgpu_gfx_mqd_symmetrically_map_cu_mask()
571 static struct gfx_sysfs_info gfx_info[GFX_MAX]; variable5365 p->gfx_rc6_ms = gfx_info[GFX_rc6].val_ull; in get_counters()5368 p->gfx_mhz = gfx_info[GFX_MHz].val; in get_counters()5371 p->gfx_act_mhz = gfx_info[GFX_ACTMHz].val; in get_counters()5374 p->sam_mc6_ms = gfx_info[SAM_mc6].val_ull; in get_counters()5377 p->sam_mhz = gfx_info[SAM_MHz].val; in get_counters()5380 p->sam_act_mhz = gfx_info[SAM_ACTMHz].val; in get_counters()6530 rewind(gfx_info[idx].fp); in snapshot_graphics()6531 fflush(gfx_info[idx].fp); in snapshot_graphics()6536 retval = fscanf(gfx_info[idx].fp, "%lld", &gfx_info[idx].val_ull); in snapshot_graphics()[all …]
735 klinfo_t gfx_info; member