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Searched refs:fw_shared (Results 1 – 10 of 10) sorted by relevance

/linux/drivers/gpu/drm/amd/amdgpu/
H A Dvcn_v4_0_5.c150 volatile struct amdgpu_vcn4_fw_shared *fw_shared; in vcn_v4_0_5_sw_init() local
185 fw_shared = adev->vcn.inst[i].fw_shared.cpu_addr; in vcn_v4_0_5_sw_init()
186 fw_shared->present_flag_0 = cpu_to_le32(AMDGPU_FW_SHARED_FLAG_0_UNIFIED_QUEUE); in vcn_v4_0_5_sw_init()
187 fw_shared->sq.is_enabled = 1; in vcn_v4_0_5_sw_init()
189 fw_shared->present_flag_0 |= cpu_to_le32(AMDGPU_VCN_SMU_DPM_INTERFACE_FLAG); in vcn_v4_0_5_sw_init()
190 fw_shared->smu_dpm_interface.smu_interface_type = (adev->flags & AMD_IS_APU) ? in vcn_v4_0_5_sw_init()
194 fw_shared->present_flag_0 |= cpu_to_le32(AMDGPU_VCN_VF_RB_SETUP_FLAG); in vcn_v4_0_5_sw_init()
234 volatile struct amdgpu_vcn4_fw_shared *fw_shared; in vcn_v4_0_5_sw_fini() local
239 fw_shared = adev->vcn.inst[i].fw_shared.cpu_addr; in vcn_v4_0_5_sw_fini()
240 fw_shared->present_flag_0 = 0; in vcn_v4_0_5_sw_fini()
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H A Dvcn_v3_0.c193 volatile struct amdgpu_fw_shared *fw_shared; in vcn_v3_0_sw_init() local
263 fw_shared = adev->vcn.inst[i].fw_shared.cpu_addr; in vcn_v3_0_sw_init()
264 fw_shared->present_flag_0 |= cpu_to_le32(AMDGPU_VCN_SW_RING_FLAG) | in vcn_v3_0_sw_init()
267 fw_shared->sw_ring.is_enabled = cpu_to_le32(DEC_SW_RING_ENABLED); in vcn_v3_0_sw_init()
268 fw_shared->present_flag_0 |= AMDGPU_VCN_SMU_VERSION_INFO_FLAG; in vcn_v3_0_sw_init()
270 fw_shared->smu_interface_info.smu_interface_type = 2; in vcn_v3_0_sw_init()
273 fw_shared->smu_interface_info.smu_interface_type = 1; in vcn_v3_0_sw_init()
313 volatile struct amdgpu_fw_shared *fw_shared; in vcn_v3_0_sw_fini() local
317 fw_shared = adev->vcn.inst[i].fw_shared.cpu_addr; in vcn_v3_0_sw_fini()
318 fw_shared->present_flag_0 = 0; in vcn_v3_0_sw_fini()
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H A Dvcn_v5_0_0.c134 volatile struct amdgpu_vcn5_fw_shared *fw_shared; in vcn_v5_0_0_sw_init() local
165 fw_shared = adev->vcn.inst[i].fw_shared.cpu_addr; in vcn_v5_0_0_sw_init()
166 fw_shared->present_flag_0 = cpu_to_le32(AMDGPU_FW_SHARED_FLAG_0_UNIFIED_QUEUE); in vcn_v5_0_0_sw_init()
167 fw_shared->sq.is_enabled = 1; in vcn_v5_0_0_sw_init()
201 volatile struct amdgpu_vcn5_fw_shared *fw_shared; in vcn_v5_0_0_sw_fini() local
206 fw_shared = adev->vcn.inst[i].fw_shared.cpu_addr; in vcn_v5_0_0_sw_fini()
207 fw_shared->present_flag_0 = 0; in vcn_v5_0_0_sw_fini()
208 fw_shared->sq.is_enabled = 0; in vcn_v5_0_0_sw_fini()
378 lower_32_bits(adev->vcn.inst[inst].fw_shared.gpu_addr)); in vcn_v5_0_0_mc_resume()
380 upper_32_bits(adev->vcn.inst[inst].fw_shared.gpu_addr)); in vcn_v5_0_0_mc_resume()
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H A Dvcn_v4_0.c141 volatile struct amdgpu_vcn4_fw_shared *fw_shared; in vcn_v4_0_fw_shared_init() local
143 fw_shared = adev->vcn.inst[inst_idx].fw_shared.cpu_addr; in vcn_v4_0_fw_shared_init()
144 fw_shared->present_flag_0 = cpu_to_le32(AMDGPU_FW_SHARED_FLAG_0_UNIFIED_QUEUE); in vcn_v4_0_fw_shared_init()
145 fw_shared->sq.is_enabled = 1; in vcn_v4_0_fw_shared_init()
147 fw_shared->present_flag_0 |= cpu_to_le32(AMDGPU_VCN_SMU_DPM_INTERFACE_FLAG); in vcn_v4_0_fw_shared_init()
148 fw_shared->smu_dpm_interface.smu_interface_type = (adev->flags & AMD_IS_APU) ? in vcn_v4_0_fw_shared_init()
153 fw_shared->present_flag_0 |= AMDGPU_FW_SHARED_FLAG_0_DRM_KEY_INJECT; in vcn_v4_0_fw_shared_init()
154 fw_shared->drm_key_wa.method = in vcn_v4_0_fw_shared_init()
267 volatile struct amdgpu_vcn4_fw_shared *fw_shared; in vcn_v4_0_sw_fini() local
272 fw_shared = adev->vcn.inst[i].fw_shared.cpu_addr; in vcn_v4_0_sw_fini()
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H A Dvcn_v4_0_3.c151 volatile struct amdgpu_vcn4_fw_shared *fw_shared; in vcn_v4_0_3_sw_init() local
175 fw_shared = adev->vcn.inst[i].fw_shared.cpu_addr; in vcn_v4_0_3_sw_init()
176 fw_shared->present_flag_0 = cpu_to_le32(AMDGPU_FW_SHARED_FLAG_0_UNIFIED_QUEUE); in vcn_v4_0_3_sw_init()
177 fw_shared->sq.is_enabled = true; in vcn_v4_0_3_sw_init()
226 volatile struct amdgpu_vcn4_fw_shared *fw_shared; in vcn_v4_0_3_sw_fini() local
228 fw_shared = adev->vcn.inst[i].fw_shared.cpu_addr; in vcn_v4_0_3_sw_fini()
229 fw_shared->present_flag_0 = 0; in vcn_v4_0_3_sw_fini()
230 fw_shared->sq.is_enabled = cpu_to_le32(false); in vcn_v4_0_3_sw_fini()
433 lower_32_bits(adev->vcn.inst[inst_idx].fw_shared.gpu_addr)); in vcn_v4_0_3_mc_resume()
436 upper_32_bits(adev->vcn.inst[inst_idx].fw_shared.gpu_addr)); in vcn_v4_0_3_mc_resume()
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H A Dvcn_v2_0.c138 volatile struct amdgpu_fw_shared *fw_shared; in vcn_v2_0_sw_init() local
219 fw_shared = adev->vcn.inst->fw_shared.cpu_addr; in vcn_v2_0_sw_init()
220 fw_shared->present_flag_0 = cpu_to_le32(AMDGPU_VCN_MULTI_QUEUE_FLAG); in vcn_v2_0_sw_init()
248 volatile struct amdgpu_fw_shared *fw_shared = adev->vcn.inst->fw_shared.cpu_addr; in vcn_v2_0_sw_fini() local
251 fw_shared->present_flag_0 = 0; in vcn_v2_0_sw_fini()
421 lower_32_bits(adev->vcn.inst->fw_shared.gpu_addr)); in vcn_v2_0_mc_resume()
423 upper_32_bits(adev->vcn.inst->fw_shared.gpu_addr)); in vcn_v2_0_mc_resume()
512 lower_32_bits(adev->vcn.inst->fw_shared.gpu_addr), 0, indirect); in vcn_v2_0_mc_resume_dpg_mode()
515 upper_32_bits(adev->vcn.inst->fw_shared.gpu_addr), 0, indirect); in vcn_v2_0_mc_resume_dpg_mode()
841 volatile struct amdgpu_fw_shared *fw_shared = adev->vcn.inst->fw_shared.cpu_addr; in vcn_v2_0_start_dpg_mode() local
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H A Dvcn_v2_5.c201 volatile struct amdgpu_fw_shared *fw_shared; in vcn_v2_5_sw_init() local
263 fw_shared = adev->vcn.inst[j].fw_shared.cpu_addr; in vcn_v2_5_sw_init()
264 fw_shared->present_flag_0 = cpu_to_le32(AMDGPU_VCN_MULTI_QUEUE_FLAG); in vcn_v2_5_sw_init()
306 volatile struct amdgpu_fw_shared *fw_shared; in vcn_v2_5_sw_fini() local
312 fw_shared = adev->vcn.inst[i].fw_shared.cpu_addr; in vcn_v2_5_sw_fini()
313 fw_shared->present_flag_0 = 0; in vcn_v2_5_sw_fini()
508 lower_32_bits(adev->vcn.inst[i].fw_shared.gpu_addr)); in vcn_v2_5_mc_resume()
510 upper_32_bits(adev->vcn.inst[i].fw_shared.gpu_addr)); in vcn_v2_5_mc_resume()
598 lower_32_bits(adev->vcn.inst[inst_idx].fw_shared.gpu_addr), 0, indirect); in vcn_v2_5_mc_resume_dpg_mode()
601 upper_32_bits(adev->vcn.inst[inst_idx].fw_shared.gpu_addr), 0, indirect); in vcn_v2_5_mc_resume_dpg_mode()
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H A Damdgpu_vcn.c219 adev->vcn.inst[i].fw_shared.cpu_addr = adev->vcn.inst[i].cpu_addr + in amdgpu_vcn_sw_init()
221 adev->vcn.inst[i].fw_shared.gpu_addr = adev->vcn.inst[i].gpu_addr + in amdgpu_vcn_sw_init()
224 adev->vcn.inst[i].fw_shared.mem_size = fw_shared_size; in amdgpu_vcn_sw_init()
227 adev->vcn.inst[i].fw_shared.cpu_addr -= AMDGPU_VCNFW_LOG_SIZE; in amdgpu_vcn_sw_init()
228 adev->vcn.inst[i].fw_shared.gpu_addr -= AMDGPU_VCNFW_LOG_SIZE; in amdgpu_vcn_sw_init()
229 adev->vcn.inst[i].fw_shared.log_offset = log_offset; in amdgpu_vcn_sw_init()
1096 if (!vcn->fw_shared.cpu_addr || !amdgpu_vcnfw_log) in amdgpu_debugfs_vcn_fwlog_read()
1099 log_buf = vcn->fw_shared.cpu_addr + vcn->fw_shared.mem_size; in amdgpu_debugfs_vcn_fwlog_read()
1168 volatile uint32_t *flag = vcn->fw_shared.cpu_addr; in amdgpu_vcn_fwlog_init()
1169 void *fw_log_cpu_addr = vcn->fw_shared.cpu_addr + vcn->fw_shared.mem_size; in amdgpu_vcn_fwlog_init()
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H A Damdgpu_vcn.h298 struct amdgpu_vcn_fw_shared fw_shared; member
H A Dvcn_v1_0.c194 volatile struct amdgpu_fw_shared *fw_shared = adev->vcn.inst->fw_shared.cpu_addr; in vcn_v1_0_sw_init() local
196 fw_shared->present_flag_0 = 0; in vcn_v1_0_sw_init()