Searched refs:fw_shared (Results 1 – 4 of 4) sorted by relevance
132 struct amdgpu_vcn5_fw_shared *fw_shared; in vcn_v5_0_0_sw_init() local173 fw_shared = adev->vcn.inst[i].fw_shared.cpu_addr; in vcn_v5_0_0_sw_init()174 fw_shared->present_flag_0 = cpu_to_le32(AMDGPU_FW_SHARED_FLAG_0_UNIFIED_QUEUE); in vcn_v5_0_0_sw_init()175 fw_shared->sq.is_enabled = 1; in vcn_v5_0_0_sw_init()177 fw_shared->present_flag_0 |= cpu_to_le32(AMDGPU_VCN_SMU_DPM_INTERFACE_FLAG); in vcn_v5_0_0_sw_init()178 fw_shared->smu_dpm_interface.smu_interface_type = (adev->flags & AMD_IS_APU) ? in vcn_v5_0_0_sw_init()218 struct amdgpu_vcn5_fw_shared *fw_shared; in vcn_v5_0_0_sw_fini() local223 fw_shared = adev->vcn.inst[i].fw_shared.cpu_addr; in vcn_v5_0_0_sw_fini()224 fw_shared->present_flag_0 = 0; in vcn_v5_0_0_sw_fini()225 fw_shared->sq.is_enabled = 0; in vcn_v5_0_0_sw_fini()[all …]
194 struct amdgpu_fw_shared *fw_shared; in vcn_v3_0_sw_init() local274 fw_shared = adev->vcn.inst[i].fw_shared.cpu_addr; in vcn_v3_0_sw_init()275 fw_shared->present_flag_0 |= cpu_to_le32(AMDGPU_VCN_SW_RING_FLAG) | in vcn_v3_0_sw_init()278 fw_shared->sw_ring.is_enabled = cpu_to_le32(DEC_SW_RING_ENABLED); in vcn_v3_0_sw_init()279 fw_shared->present_flag_0 |= AMDGPU_VCN_SMU_VERSION_INFO_FLAG; in vcn_v3_0_sw_init()281 fw_shared->smu_interface_info.smu_interface_type = 2; in vcn_v3_0_sw_init()284 fw_shared->smu_interface_info.smu_interface_type = 1; in vcn_v3_0_sw_init()330 struct amdgpu_fw_shared *fw_shared; in vcn_v3_0_sw_fini() local334 fw_shared = adev->vcn.inst[i].fw_shared.cpu_addr; in vcn_v3_0_sw_fini()335 fw_shared->present_flag_0 = 0; in vcn_v3_0_sw_fini()[all …]
151 struct amdgpu_vcn4_fw_shared *fw_shared; in vcn_v4_0_fw_shared_init() local153 fw_shared = adev->vcn.inst[inst_idx].fw_shared.cpu_addr; in vcn_v4_0_fw_shared_init()154 fw_shared->present_flag_0 = cpu_to_le32(AMDGPU_FW_SHARED_FLAG_0_UNIFIED_QUEUE); in vcn_v4_0_fw_shared_init()155 fw_shared->sq.is_enabled = 1; in vcn_v4_0_fw_shared_init()157 fw_shared->present_flag_0 |= cpu_to_le32(AMDGPU_VCN_SMU_DPM_INTERFACE_FLAG); in vcn_v4_0_fw_shared_init()158 fw_shared->smu_dpm_interface.smu_interface_type = (adev->flags & AMD_IS_APU) ? in vcn_v4_0_fw_shared_init()163 fw_shared->present_flag_0 |= AMDGPU_FW_SHARED_FLAG_0_DRM_KEY_INJECT; in vcn_v4_0_fw_shared_init()164 fw_shared->drm_key_wa.method = in vcn_v4_0_fw_shared_init()281 struct amdgpu_vcn4_fw_shared *fw_shared; in vcn_v4_0_sw_fini() local286 fw_shared = adev->vcn.inst[i].fw_shared.cpu_addr; in vcn_v4_0_sw_fini()[all …]
140 struct amdgpu_fw_shared *fw_shared; in vcn_v2_0_sw_init() local227 fw_shared = adev->vcn.inst->fw_shared.cpu_addr; in vcn_v2_0_sw_init()228 fw_shared->present_flag_0 = cpu_to_le32(AMDGPU_VCN_MULTI_QUEUE_FLAG); in vcn_v2_0_sw_init()255 struct amdgpu_fw_shared *fw_shared = adev->vcn.inst->fw_shared.cpu_addr; in vcn_v2_0_sw_fini() local258 fw_shared->present_flag_0 = 0; in vcn_v2_0_sw_fini()428 lower_32_bits(adev->vcn.inst->fw_shared.gpu_addr)); in vcn_v2_0_mc_resume()430 upper_32_bits(adev->vcn.inst->fw_shared.gpu_addr)); in vcn_v2_0_mc_resume()521 lower_32_bits(adev->vcn.inst->fw_shared.gpu_addr), 0, indirect); in vcn_v2_0_mc_resume_dpg_mode()524 upper_32_bits(adev->vcn.inst->fw_shared.gpu_addr), 0, indirect); in vcn_v2_0_mc_resume_dpg_mode()856 struct amdgpu_fw_shared *fw_shared = adev->vcn.inst->fw_shared.cpu_addr; in vcn_v2_0_start_dpg_mode() local[all …]