Searched refs:fuses (Results 1 – 12 of 12) sorted by relevance
| /linux/drivers/nvmem/ |
| H A D | apple-efuses.c | 15 void __iomem *fuses; member 25 *dst++ = readl_relaxed(priv->fuses + offset); in apple_efuses_read() 53 priv->fuses = devm_platform_get_and_ioremap_resource(pdev, 0, &res); in apple_efuses_probe() 54 if (IS_ERR(priv->fuses)) in apple_efuses_probe() 55 return PTR_ERR(priv->fuses); in apple_efuses_probe()
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| H A D | Kconfig | 308 Enable support for reading the fuses in the E-FUSE or OTP
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| /linux/drivers/pmdomain/qcom/ |
| H A D | cpr.c | 804 const struct cpr_fuse *fuses = drv->cpr_fuses; in cpr_populate_ring_osc_idx() local 808 for (; fuse < end; fuse++, fuses++) { in cpr_populate_ring_osc_idx() 809 ret = nvmem_cell_read_variable_le_u32(drv->dev, fuses->ring_osc, &data); in cpr_populate_ring_osc_idx() 846 const struct cpr_fuse *fuses = drv->cpr_fuses; in cpr_fuse_corner_init() local 867 for (i = 0; fuse <= end; fuse++, fuses++, i++, fdata++) { in cpr_fuse_corner_init() 877 uV = cpr_read_fuse_uV(desc, fdata, fuses->init_voltage, in cpr_fuse_corner_init() 897 ret = nvmem_cell_read_variable_le_u32(drv->dev, fuses->quotient, &fuse->quot); in cpr_fuse_corner_init() 1068 const struct cpr_fuse *fuses = drv->cpr_fuses; in cpr_corner_init() local 1166 quot_offset = fuses[fnum].quotient_offset; in cpr_corner_init() 1219 struct cpr_fuse *fuses; in cpr_get_fuses() local [all …]
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| /linux/Documentation/devicetree/bindings/cpufreq/ |
| H A D | imx-cpufreq-dt.txt | 5 "speed grading" value which are written in fuses. These bits are combined with
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| /linux/arch/arm/boot/dts/nvidia/ |
| H A D | tegra30-asus-tf201.dts | 590 /delete-property/ nvidia,xcvr-setup-use-fuses; 595 /delete-property/ nvidia,xcvr-setup-use-fuses;
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| H A D | tegra30.dtsi | 1163 nvidia,xcvr-setup-use-fuses; 1206 nvidia,xcvr-setup-use-fuses; 1248 nvidia,xcvr-setup-use-fuses;
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| H A D | tegra20-acer-a500-picasso.dts | 1107 nvidia,xcvr-setup-use-fuses; 1118 nvidia,xcvr-setup-use-fuses;
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| /linux/drivers/nvme/target/ |
| H A D | passthru.c | 138 id->fuses = 0; in nvmet_passthru_override_id_ctrl()
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| /linux/Documentation/security/keys/ |
| H A D | trusted-encrypted.rst | 67 fuses and is accessible to TEE only. 79 in the on-chip fuses and is accessible to the DCP encryption engine only.
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| /linux/include/linux/ |
| H A D | nvme.h | 371 __le16 fuses; member
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| /linux/arch/arm64/boot/dts/freescale/ |
| H A D | imx8mn.dtsi | 581 * reg = <0x4 0x8> describes fuses 0x410 and
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| H A D | imx8mp.dtsi | 720 * reg = <0x8 0x8> describes fuses 0x420 and
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