| /linux/drivers/gpu/drm/mediatek/ |
| H A D | mtk_ddp_comp.h | 100 const struct mtk_ddp_comp_funcs *funcs; member 105 if (comp->funcs && comp->funcs->power_on) in mtk_ddp_comp_power_on() 106 return comp->funcs->power_on(comp->dev); in mtk_ddp_comp_power_on() 114 if (comp->funcs && comp->funcs->power_off) in mtk_ddp_comp_power_off() 115 comp->funcs->power_off(comp->dev); in mtk_ddp_comp_power_off() 122 if (comp->funcs && comp->funcs->clk_enable) in mtk_ddp_comp_clk_enable() 123 return comp->funcs->clk_enable(comp->dev); in mtk_ddp_comp_clk_enable() 130 if (comp->funcs && comp->funcs->clk_disable) in mtk_ddp_comp_clk_disable() 131 comp->funcs->clk_disable(comp->dev); in mtk_ddp_comp_clk_disable() 138 if (comp && comp->funcs && comp->funcs->mode_valid) in mtk_ddp_comp_mode_valid() [all …]
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| /linux/drivers/gpu/drm/amd/display/dc/hwss/dcn35/ |
| H A D | dcn35_hwseq.c | 102 dc->res_pool->mpc->funcs->set_mpc_mem_lp_mode) 103 dc->res_pool->mpc->funcs->set_mpc_mem_lp_mode(dc->res_pool->mpc); 105 …if (dc->debug.enable_mem_low_power.bits.vpg && dc->res_pool->stream_enc[0]->vpg->funcs->vpg_powerd… 108 dc->res_pool->stream_enc[i]->vpg->funcs->vpg_powerdown(dc->res_pool->stream_enc[i]->vpg); 111 …dc->res_pool->hpo_dp_stream_enc[i]->vpg->funcs->vpg_powerdown(dc->res_pool->hpo_dp_stream_enc[i]->… 121 if (dc->res_pool->pg_cntl->funcs->print_pg_status) in print_pg_status() 122 dc->res_pool->pg_cntl->funcs->print_pg_status(dc->res_pool->pg_cntl, debug_func, debug_log); in print_pg_status() 152 if (dc->clk_mgr && dc->clk_mgr->funcs->init_clocks) in dcn35_init_hw() 153 dc->clk_mgr->funcs->init_clocks(dc->clk_mgr); in dcn35_init_hw() 157 if (!dcb->funcs->is_accelerated_mode(dcb)) { in dcn35_init_hw() [all …]
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| /linux/drivers/gpu/drm/amd/display/dc/hwss/dcn30/ |
| H A D | dcn30_hwseq.c | 94 dpp->funcs->dpp_read_state(dpp, &s); in dcn30_log_color_state() 96 if (dpp->funcs->dpp_get_gamut_remap) { in dcn30_log_color_state() 97 dpp->funcs->dpp_get_gamut_remap(dpp, &s.gamut_remap); in dcn30_log_color_state() 185 pool->mpc->funcs->read_mpcc_state(pool->mpc, i, &s); in dcn30_log_color_state() 251 result = dpp_base->funcs->dpp_program_blnd_lut(dpp_base, blend_lut); in dcn30_set_blend_lut() 293 acquired_rmu = mpc->funcs->acquire_rmu(mpc, mpcc_id, in dcn30_set_mpc_shaper_3dlut() 298 result = mpc->funcs->program_3dlut(mpc, &stream->lut3d_func->lut_3d, in dcn30_set_mpc_shaper_3dlut() 303 result = mpc->funcs->program_shaper(mpc, shaper_lut, in dcn30_set_mpc_shaper_3dlut() 310 mpc->funcs->release_rmu(mpc, mpcc_id); in dcn30_set_mpc_shaper_3dlut() 334 dpp_base->funcs->dpp_set_pre_degam(dpp_base, tf); in dcn30_set_input_transfer_func() [all …]
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| /linux/drivers/gpu/drm/amd/display/dc/hwss/dcn31/ |
| H A D | dcn31_hwseq.c | 96 dc->res_pool->mpc->funcs->set_mpc_mem_lp_mode) in enable_memory_low_power() 97 dc->res_pool->mpc->funcs->set_mpc_mem_lp_mode(dc->res_pool->mpc); in enable_memory_low_power() 100 …if (dc->debug.enable_mem_low_power.bits.vpg && dc->res_pool->stream_enc[0]->vpg->funcs->vpg_powerd… in enable_memory_low_power() 104 dc->res_pool->stream_enc[i]->vpg->funcs->vpg_powerdown(dc->res_pool->stream_enc[i]->vpg); in enable_memory_low_power() 106 …dc->res_pool->hpo_dp_stream_enc[i]->vpg->funcs->vpg_powerdown(dc->res_pool->hpo_dp_stream_enc[i]->… in enable_memory_low_power() 121 if (dc->clk_mgr && dc->clk_mgr->funcs->init_clocks) in dcn31_init_hw() 122 dc->clk_mgr->funcs->init_clocks(dc->clk_mgr); in dcn31_init_hw() 124 if (!dcb->funcs->is_accelerated_mode(dcb)) { in dcn31_init_hw() 125 hws->funcs.bios_golden_init(dc); in dcn31_init_hw() 126 if (hws->funcs.disable_vga) in dcn31_init_hw() [all …]
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| /linux/drivers/gpu/drm/amd/display/dc/hwss/dcn20/ |
| H A D | dcn20_hwseq.c | 93 dpp->funcs->dpp_read_state(dpp, &s); in dcn20_log_color_state() 94 if (dpp->funcs->dpp_get_gamut_remap) { in dcn20_log_color_state() 95 dpp->funcs->dpp_get_gamut_remap(dpp, &s.gamut_remap); in dcn20_log_color_state() 172 pool->mpc->funcs->read_mpcc_state(pool->mpc, i, &s); in dcn20_log_color_state() 287 if (pipe_ctx->stream_res.tg->funcs->set_gsl != NULL) { in dcn20_setup_gsl_group_as_lock() 288 pipe_ctx->stream_res.tg->funcs->set_gsl( in dcn20_setup_gsl_group_as_lock() 291 if (pipe_ctx->stream_res.tg->funcs->set_gsl_source_select != NULL) in dcn20_setup_gsl_group_as_lock() 292 pipe_ctx->stream_res.tg->funcs->set_gsl_source_select( in dcn20_setup_gsl_group_as_lock() 302 if (pipe_ctx && pipe_ctx->plane_res.hubp->funcs->hubp_set_flip_control_surface_gsl) in dcn20_set_flip_control_gsl() 303 pipe_ctx->plane_res.hubp->funcs->hubp_set_flip_control_surface_gsl( in dcn20_set_flip_control_gsl() [all …]
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| /linux/drivers/gpu/drm/amd/display/dc/hwss/dcn201/ |
| H A D | dcn201_hwseq.c | 152 pipe_ctx->plane_res.hubp->funcs->hubp_program_surface_flip_and_addr( in dcn201_update_plane_addr() 183 tg->funcs->get_otg_active_size(tg, in dcn201_init_blank() 188 tg->funcs->get_optc_source(tg, &num_opps, &opp_id_src0, &opp_id_src1); in dcn201_init_blank() 192 opp->funcs->opp_set_disp_pattern_generator( in dcn201_init_blank() 202 hws->funcs.wait_for_blank_complete(opp); in dcn201_init_blank() 234 if (res_pool->dccg->funcs->dccg_init) in dcn201_init_hw() 235 res_pool->dccg->funcs->dccg_init(res_pool->dccg); in dcn201_init_hw() 237 if (dc->clk_mgr && dc->clk_mgr->funcs->init_clocks) in dcn201_init_hw() 238 dc->clk_mgr->funcs->init_clocks(dc->clk_mgr); in dcn201_init_hw() 240 hws->funcs.bios_golden_init(dc); in dcn201_init_hw() [all …]
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| /linux/drivers/gpu/drm/amd/display/dc/hwss/dcn10/ |
| H A D | dcn10_hwseq.c | 125 if (tg->funcs->is_tg_enabled && !tg->funcs->is_tg_enabled(tg)) in dcn10_wait_for_pipe_update_if_needed() 134 frame_count = tg->funcs->get_frame_count(tg); in dcn10_wait_for_pipe_update_if_needed() 201 if (tg->funcs->is_tg_enabled && !tg->funcs->is_tg_enabled(tg)) in dcn10_set_wait_for_update_needed_for_pipe() 206 cur_frame = tg->funcs->get_frame_count(tg); in dcn10_set_wait_for_update_needed_for_pipe() 241 !tg->funcs->is_tg_enabled(tg) || in dcn10_lock_all_pipes() 274 dc->res_pool->hubbub->funcs->wm_read_state(dc->res_pool->hubbub, &wm); in dcn10_log_hubbub_state() 307 hubp->funcs->hubp_read_state(hubp); in dcn10_log_hubp_states() 467 dpp->funcs->dpp_read_state(dpp, &s); in dcn10_log_color_state() 468 if (dpp->funcs->dpp_get_gamut_remap) { in dcn10_log_color_state() 469 dpp->funcs->dpp_get_gamut_remap(dpp, &s.gamut_remap); in dcn10_log_color_state() [all …]
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| /linux/drivers/gpu/drm/amd/display/dc/hwss/dcn401/ |
| H A D | dcn401_hwseq.c | 75 if (dc->clk_mgr->funcs->get_dispclk_from_dentist) { in dcn401_initialize_min_clocks() 76 clocks->dispclk_khz = dc->clk_mgr->funcs->get_dispclk_from_dentist(dc->clk_mgr); in dcn401_initialize_min_clocks() 85 dc->clk_mgr->funcs->update_clocks( in dcn401_initialize_min_clocks() 115 mpc->funcs->set_gamut_remap(mpc, mpcc_id, &mpc_adjust); in dcn401_program_gamut_remap() 121 mpc->funcs->set_gamut_remap(mpc, mpcc_id, &mpc_adjust); in dcn401_program_gamut_remap() 137 mpc->funcs->set_gamut_remap(mpc, mpcc_id, &mpc_adjust); in dcn401_program_gamut_remap() 152 if (dc->clk_mgr && dc->clk_mgr->funcs && dc->clk_mgr->funcs->init_clocks) { in dcn401_init_hw() 153 dc->clk_mgr->funcs->init_clocks(dc->clk_mgr); in dcn401_init_hw() 156 dc->caps.dcmode_power_limits_present = dc->clk_mgr->funcs->is_dc_mode_present && in dcn401_init_hw() 157 dc->clk_mgr->funcs->is_dc_mode_present(dc->clk_mgr); in dcn401_init_hw() [all …]
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| /linux/drivers/gpu/drm/amd/display/dc/hwss/dcn32/ |
| H A D | dcn32_hwseq.c | 250 } else if (dc->res_pool->funcs->calculate_mall_ways_from_bytes) { in dcn32_calculate_cab_allocation() 251 num_ways = dc->res_pool->funcs->calculate_mall_ways_from_bytes(dc, mall_ss_size_bytes); in dcn32_calculate_cab_allocation() 416 pipe->stream_res.tg->funcs->wait_for_state(pipe->stream_res.tg, CRTC_STATE_VBLANK); in dcn32_subvp_pipe_control_lock() 471 result = mpc->funcs->program_3dlut(mpc, &stream->lut3d_func->lut_3d, mpcc_id); in dcn32_set_mpc_shaper_3dlut() 475 result = mpc->funcs->program_shaper(mpc, shaper_lut, mpcc_id); in dcn32_set_mpc_shaper_3dlut() 504 mpc->funcs->program_1dlut(mpc, lut_params, mpcc_id); in dcn32_set_mcm_luts() 518 mpc->funcs->program_shaper(mpc, lut_params, mpcc_id); in dcn32_set_mcm_luts() 522 result = mpc->funcs->program_3dlut(mpc, &plane_state->lut3d_func.lut_3d, mpcc_id); in dcn32_set_mcm_luts() 524 result = mpc->funcs->program_3dlut(mpc, NULL, mpcc_id); in dcn32_set_mcm_luts() 549 dpp_base->funcs->dpp_set_pre_degam(dpp_base, tf); in dcn32_set_input_transfer_func() [all …]
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| /linux/drivers/gpu/drm/display/ |
| H A D | drm_hdmi_audio_helper.c | 20 const struct drm_connector_hdmi_audio_funcs *funcs = in drm_connector_hdmi_audio_startup() local 21 connector->hdmi_audio.funcs; in drm_connector_hdmi_audio_startup() 23 if (funcs->startup) in drm_connector_hdmi_audio_startup() 24 return funcs->startup(connector); in drm_connector_hdmi_audio_startup() 34 const struct drm_connector_hdmi_audio_funcs *funcs = in drm_connector_hdmi_audio_prepare() local 35 connector->hdmi_audio.funcs; in drm_connector_hdmi_audio_prepare() 37 return funcs->prepare(connector, fmt, hparms); in drm_connector_hdmi_audio_prepare() 43 const struct drm_connector_hdmi_audio_funcs *funcs = in drm_connector_hdmi_audio_shutdown() local 44 connector->hdmi_audio.funcs; in drm_connector_hdmi_audio_shutdown() 46 return funcs->shutdown(connector); in drm_connector_hdmi_audio_shutdown() [all …]
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| H A D | drm_hdmi_cec_helper.c | 18 const struct drm_connector_hdmi_cec_funcs *funcs; member 26 return data->funcs->enable(connector, enable); in drm_connector_hdmi_cec_adap_enable() 34 return data->funcs->log_addr(connector, logical_addr); in drm_connector_hdmi_cec_adap_log_addr() 43 return data->funcs->transmit(connector, attempts, signal_free_time, msg); in drm_connector_hdmi_cec_adap_transmit() 74 if (data->funcs->uninit) in drm_connector_hdmi_cec_adapter_unregister() 75 data->funcs->uninit(connector); in drm_connector_hdmi_cec_adapter_unregister() 87 const struct drm_connector_hdmi_cec_funcs *funcs, in drmm_connector_hdmi_cec_register() argument 97 if (!funcs->init || !funcs->enable || !funcs->log_addr || !funcs->transmit) in drmm_connector_hdmi_cec_register() 104 data->funcs = funcs; in drmm_connector_hdmi_cec_register() 121 connector->cec.funcs = &drm_connector_hdmi_cec_adapter_funcs; in drmm_connector_hdmi_cec_register() [all …]
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| /linux/drivers/gpu/drm/amd/display/dc/hwss/dce110/ |
| H A D | dce110_hwseq.c | 230 bp_result = dcb->funcs->enable_disp_power_gating( in dce110_enable_display_power_gating() 298 ipp->funcs->ipp_program_prescale(ipp, &prescale_params); in dce110_set_input_transfer_func() 302 ipp->funcs->ipp_program_input_lut(ipp, &plane_state->gamma_correction); in dce110_set_input_transfer_func() 307 ipp->funcs->ipp_set_degamma(ipp, IPP_DEGAMMA_MODE_HW_sRGB); in dce110_set_input_transfer_func() 310 ipp->funcs->ipp_set_degamma(ipp, IPP_DEGAMMA_MODE_HW_xvYCC); in dce110_set_input_transfer_func() 313 ipp->funcs->ipp_set_degamma(ipp, IPP_DEGAMMA_MODE_BYPASS); in dce110_set_input_transfer_func() 321 ipp->funcs->ipp_set_degamma(ipp, IPP_DEGAMMA_MODE_BYPASS); in dce110_set_input_transfer_func() 612 xfm->funcs->opp_power_on_regamma_lut(xfm, true); in dce110_set_output_transfer_func() 617 xfm->funcs->opp_set_regamma_mode(xfm, OPP_REGAMMA_SRGB); in dce110_set_output_transfer_func() 620 xfm->funcs->opp_program_regamma_pwl(xfm, &xfm->regamma_params); in dce110_set_output_transfer_func() [all …]
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| /linux/drivers/gpu/drm/amd/amdgpu/ |
| H A D | amdgpu_ib.c | 190 (!ring->funcs->secure_submission_supported)) { in amdgpu_ib_schedule() 196 alloc_size = ring->funcs->emit_frame_size + num_ibs * in amdgpu_ib_schedule() 197 ring->funcs->emit_ib_size; in amdgpu_ib_schedule() 206 if (ring->funcs->emit_pipeline_sync && job && in amdgpu_ib_schedule() 218 if ((ib->flags & AMDGPU_IB_FLAG_EMIT_MEM_SYNC) && ring->funcs->emit_mem_sync) in amdgpu_ib_schedule() 219 ring->funcs->emit_mem_sync(ring); in amdgpu_ib_schedule() 221 if (ring->funcs->emit_wave_limit && in amdgpu_ib_schedule() 223 ring->funcs->emit_wave_limit(ring, true); in amdgpu_ib_schedule() 225 if (ring->funcs->insert_start) in amdgpu_ib_schedule() 226 ring->funcs->insert_start(ring); in amdgpu_ib_schedule() [all …]
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| H A D | amdgpu_umsch_mm.h | 139 const struct umsch_mm_funcs *funcs; member 212 ((umsch)->funcs->set_hw_resources ? (umsch)->funcs->set_hw_resources((umsch)) : 0) 214 ((umsch)->funcs->add_queue ? (umsch)->funcs->add_queue((umsch), (input)) : 0) 216 ((umsch)->funcs->remove_queue ? (umsch)->funcs->remove_queue((umsch), (input)) : 0) 219 ((umsch)->funcs->set_regs ? (umsch)->funcs->set_regs((umsch)) : 0) 221 ((umsch)->funcs->init_microcode ? (umsch)->funcs->init_microcode((umsch)) : 0) 223 ((umsch)->funcs->load_microcode ? (umsch)->funcs->load_microcode((umsch)) : 0) 226 ((umsch)->funcs->ring_init ? (umsch)->funcs->ring_init((umsch)) : 0) 228 ((umsch)->funcs->ring_start ? (umsch)->funcs->ring_start((umsch)) : 0) 230 ((umsch)->funcs->ring_stop ? (umsch)->funcs->ring_stop((umsch)) : 0) [all …]
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| H A D | amdgpu_ring.c | 90 ndw = (ndw + ring->funcs->align_mask) & ~ring->funcs->align_mask; in amdgpu_ring_alloc() 101 if (ring->funcs->begin_use) in amdgpu_ring_alloc() 102 ring->funcs->begin_use(ring); in amdgpu_ring_alloc() 121 ndw = (ndw + ring->funcs->align_mask) & ~ring->funcs->align_mask; in amdgpu_ring_alloc_reemit() 126 if (ring->funcs->begin_use) in amdgpu_ring_alloc_reemit() 127 ring->funcs->begin_use(ring); in amdgpu_ring_alloc_reemit() 148 memset32(&ring->ring[occupied], ring->funcs->nop, chunk1); in amdgpu_ring_insert_nop() 151 memset32(ring->ring, ring->funcs->nop, chunk2); in amdgpu_ring_insert_nop() 168 u32 align_mask = ring->funcs->align_mask; in amdgpu_ring_generic_pad_ib() 174 memset32(&ib->ptr[ib->length_dw], ring->funcs->nop, count); in amdgpu_ring_generic_pad_ib() [all …]
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| H A D | amdgpu_ring.h | 307 const struct amdgpu_ring_funcs *funcs; member 430 #define amdgpu_ring_parse_cs(r, p, job, ib) ((r)->funcs->parse_cs((p), (job), (ib))) 431 #define amdgpu_ring_patch_cs_in_place(r, p, job, ib) ((r)->funcs->patch_cs_in_place((p), (job), (ib… 432 #define amdgpu_ring_test_ring(r) (r)->funcs->test_ring((r)) 433 #define amdgpu_ring_test_ib(r, t) ((r)->funcs->test_ib ? (r)->funcs->test_ib((r), (t)) : 0) 434 #define amdgpu_ring_get_rptr(r) (r)->funcs->get_rptr((r)) 435 #define amdgpu_ring_get_wptr(r) (r)->funcs->get_wptr((r)) 436 #define amdgpu_ring_set_wptr(r) (r)->funcs->set_wptr((r)) 437 #define amdgpu_ring_emit_ib(r, job, ib, flags) ((r)->funcs->emit_ib((r), (job), (ib), (flags))) 438 #define amdgpu_ring_emit_pipeline_sync(r) (r)->funcs->emit_pipeline_sync((r)) [all …]
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| /linux/drivers/gpu/drm/ |
| H A D | drm_bridge.c | 275 if (bridge->funcs->destroy) in __drm_bridge_free() 276 bridge->funcs->destroy(bridge); in __drm_bridge_free() 331 const struct drm_bridge_funcs *funcs) in __devm_drm_bridge_alloc() argument 337 if (!funcs) { in __devm_drm_bridge_alloc() 349 bridge->funcs = funcs; in __devm_drm_bridge_alloc() 449 state = bridge->funcs->atomic_duplicate_state(bridge); in drm_bridge_atomic_duplicate_priv_state() 460 bridge->funcs->atomic_destroy_state(bridge, state); in drm_bridge_atomic_destroy_priv_state() 470 return bridge->funcs->atomic_reset != NULL; in drm_bridge_is_atomic() 534 if (bridge->funcs->attach) { in drm_bridge_attach() 535 ret = bridge->funcs->attach(bridge, encoder, flags); in drm_bridge_attach() [all …]
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| H A D | drm_atomic_helper.c | 123 const struct drm_connector_helper_funcs *funcs = connector->helper_private; in handle_conflicting_encoders() local 129 if (funcs->atomic_best_encoder) in handle_conflicting_encoders() 130 new_encoder = funcs->atomic_best_encoder(connector, in handle_conflicting_encoders() 132 else if (funcs->best_encoder) in handle_conflicting_encoders() 133 new_encoder = funcs->best_encoder(connector); in handle_conflicting_encoders() 299 const struct drm_connector_helper_funcs *funcs; in update_connector_routing() local 359 funcs = connector->helper_private; in update_connector_routing() 361 if (funcs->atomic_best_encoder) in update_connector_routing() 362 new_encoder = funcs->atomic_best_encoder(connector, state); in update_connector_routing() 363 else if (funcs->best_encoder) in update_connector_routing() [all …]
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| H A D | drm_encoder.c | 80 if (encoder->funcs && encoder->funcs->late_register) in drm_encoder_register_all() 81 ret = encoder->funcs->late_register(encoder); in drm_encoder_register_all() 94 if (encoder->funcs && encoder->funcs->early_unregister) in drm_encoder_unregister_all() 95 encoder->funcs->early_unregister(encoder); in drm_encoder_unregister_all() 103 const struct drm_encoder_funcs *funcs, in __drm_encoder_init() argument 118 encoder->funcs = funcs; in __drm_encoder_init() 165 const struct drm_encoder_funcs *funcs, in drm_encoder_init() argument 171 WARN_ON(!funcs->destroy); in drm_encoder_init() 174 ret = __drm_encoder_init(dev, encoder, funcs, encoder_type, name, ap); in drm_encoder_init() 223 const struct drm_encoder_funcs *funcs, in __drmm_encoder_init() argument [all …]
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| H A D | drm_client_event.c | 45 if (client->funcs && client->funcs->unregister) in drm_client_dev_unregister() 46 client->funcs->unregister(client); in drm_client_dev_unregister() 59 if (!client->funcs || !client->funcs->hotplug) in drm_client_hotplug() 71 ret = client->funcs->hotplug(client); in drm_client_hotplug() 115 if (!client->funcs || !client->funcs->restore) in drm_client_dev_restore() 118 ret = client->funcs->restore(client, force); in drm_client_dev_restore() 134 if (client->funcs && client->funcs->suspend) in drm_client_suspend() 135 ret = client->funcs->suspend(client); in drm_client_suspend() 164 if (client->funcs && client->funcs->resume) in drm_client_resume() 165 ret = client->funcs->resume(client); in drm_client_resume()
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| /linux/drivers/gpu/drm/amd/display/dc/link/hwss/ |
| H A D | link_hwss_hpo_dp.c | 41 hpo_dp_link_encoder->funcs->set_throttled_vcp_size(hpo_dp_link_encoder, in set_hpo_dp_throttled_vcp_size() 70 hpo_dp_stream_encoder->funcs->set_hblank_min_symbol_width(hpo_dp_stream_encoder, in set_hpo_dp_hblank_min_symbol_width() 79 stream_enc->funcs->enable_stream(stream_enc); in setup_hpo_dp_stream_encoder() 80 stream_enc->funcs->map_stream_to_link(stream_enc, stream_enc->inst, link_enc->inst); in setup_hpo_dp_stream_encoder() 87 stream_enc->funcs->disable(stream_enc); in reset_hpo_dp_stream_encoder() 96 stream_enc->funcs->set_stream_attribute( in setup_hpo_dp_stream_attribute() 118 if (link->dc->res_pool->dccg->funcs->set_symclk32_le_root_clock_gating) in enable_hpo_dp_link_output() 119 link->dc->res_pool->dccg->funcs->set_symclk32_le_root_clock_gating( in enable_hpo_dp_link_output() 123 link_res->hpo_dp_link_enc->funcs->enable_link_phy( in enable_hpo_dp_link_output() 139 link_res->hpo_dp_link_enc->funcs->link_disable(link_res->hpo_dp_link_enc); in disable_hpo_dp_link_output() [all …]
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| /linux/scripts/livepatch/ |
| H A D | init.c | 45 struct klp_func_ext *funcs_ext = obj_ext->funcs; in livepatch_mod_init() 47 struct klp_func *funcs = objs[i].funcs; in livepatch_mod_init() local 50 funcs = kzalloc(sizeof(struct klp_func) * (nr_funcs + 1), GFP_KERNEL); in livepatch_mod_init() 51 if (!funcs) { in livepatch_mod_init() 54 kfree(objs[i].funcs); in livepatch_mod_init() 59 funcs[j].old_name = funcs_ext[j].old_name; in livepatch_mod_init() 60 funcs[j].new_func = funcs_ext[j].new_func; in livepatch_mod_init() 61 funcs[j].old_sympos = funcs_ext[j].sympos; in livepatch_mod_init() 65 obj->funcs = funcs; in livepatch_mod_init() 96 kfree(obj->funcs); in livepatch_mod_exit()
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| /linux/drivers/gpu/drm/amd/display/dc/hwss/dcn351/ |
| H A D | dcn351_hwseq.c | 110 if (pg_cntl->funcs->dsc_pg_control) in dcn351_hw_block_power_down() 111 pg_cntl->funcs->dsc_pg_control(pg_cntl, i, false); in dcn351_hw_block_power_down() 116 if (pg_cntl->funcs->hubp_dpp_pg_control) in dcn351_hw_block_power_down() 117 pg_cntl->funcs->hubp_dpp_pg_control(pg_cntl, i, false); in dcn351_hw_block_power_down() 124 if (pg_cntl->funcs->plane_otg_pg_control) in dcn351_hw_block_power_down() 125 pg_cntl->funcs->plane_otg_pg_control(pg_cntl, false); in dcn351_hw_block_power_down() 165 if (pg_cntl->funcs->plane_otg_pg_control) in dcn351_hw_block_power_up() 166 pg_cntl->funcs->plane_otg_pg_control(pg_cntl, true); in dcn351_hw_block_power_up() 173 if (pg_cntl->funcs->hubp_dpp_pg_control) in dcn351_hw_block_power_up() 174 pg_cntl->funcs->hubp_dpp_pg_control(pg_cntl, i, true); in dcn351_hw_block_power_up() [all …]
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| /linux/drivers/gpu/drm/amd/display/dc/ |
| H A D | dc_edid_parser.c | 38 dmcu->funcs->is_dmcu_initialized(dmcu) && in dc_edid_parser_send_cea() 39 dmcu->funcs->send_edid_cea) { in dc_edid_parser_send_cea() 40 return dmcu->funcs->send_edid_cea(dmcu, in dc_edid_parser_send_cea() 55 dmcu->funcs->is_dmcu_initialized(dmcu) && in dc_edid_parser_recv_cea_ack() 56 dmcu->funcs->recv_edid_cea_ack) { in dc_edid_parser_recv_cea_ack() 57 return dmcu->funcs->recv_edid_cea_ack(dmcu, offset); in dc_edid_parser_recv_cea_ack() 71 dmcu->funcs->is_dmcu_initialized(dmcu) && in dc_edid_parser_recv_amd_vsdb() 72 dmcu->funcs->recv_amd_vsdb) { in dc_edid_parser_recv_amd_vsdb() 73 return dmcu->funcs->recv_amd_vsdb(dmcu, in dc_edid_parser_recv_amd_vsdb()
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| /linux/drivers/gpu/drm/amd/display/dc/hwss/dcn21/ |
| H A D | dcn21_hwseq.c | 84 return dc->res_pool->hubbub->funcs->init_dchub_sys_ctx(dc->res_pool->hubbub, &config); in dcn21_init_sys_ctx() 91 …if (dc->res_pool->dccg && dc->res_pool->dccg->funcs && dc->res_pool->dccg->funcs->is_s0i3_golden_i… in dcn21_s0i3_golden_init_wa() 92 return !dc->res_pool->dccg->funcs->is_s0i3_golden_init_wa_done(dc->res_pool->dccg); in dcn21_s0i3_golden_init_wa() 101 dc->clk_mgr->funcs->update_clocks( in dcn21_exit_optimized_pwr_state() 111 dc->clk_mgr->funcs->update_clocks( in dcn21_optimize_pwr_state() 197 if (abm->funcs && abm->funcs->set_pipe_ex) { in dcn21_set_abm_immediate_disable() 198 abm->funcs->set_pipe_ex(abm, otg_inst, SET_ABM_PIPE_IMMEDIATELY_DISABLE, in dcn21_set_abm_immediate_disable() 207 panel_cntl->funcs->store_backlight_level(panel_cntl); in dcn21_set_abm_immediate_disable() 229 if (abm->funcs && abm->funcs->set_pipe_ex) { in dcn21_set_pipe() 230 abm->funcs->set_pipe_ex(abm, in dcn21_set_pipe() [all …]
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